Low-area boundary BIST architecture for mesh-like network-on-chip
author
statement of authorship
Jaan Raik, Vineeth Govind
location of publication
[S. l.]
publisher
year of publication
pages
p. 95-100 : ill
conference name, date
IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), April 18-20, 2012
conference location
Tallinn
ISBN
978-1-4673-1185-4
notes
Bibliogr.: 18 ref
language
inglise
subject term
Raik, J., Govind, V. Low-area boundary BIST architecture for mesh-like network-on-chip // Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 18-20, 2012 Tallinn, Estonia. [S. l.] : IEEE, 2012. p. 95-100 : ill.