From RTL liveness assertions to cost-effective hardware checkers
vastutusandmed
Ranganathan Hariharan, Tara Ghasempouri, Behrad Niazmand, Jaan Raik
allikas
XXXIII Conference on Design of Circuits and Integrated Systems (DCIS) : proceedings
ilmumiskoht
[S.l.]
kirjastus/väljaandja
ilmumisaasta
leheküljed
6 p. : ill
konverentsi nimetus, aeg
XXXIII Conference on Design of Circuits and Integrated Systems (DCIS), 14-16 Nov. 2018
konverentsi toimumispaik
Lyon, France
ISSN
2640-5563
2471-6170
ISBN
978-1-7281-0171-2
978-1-7281-0172-9
märkused
Bibliogr.: 24 ref
TTÜ struktuuriüksus
keel
inglise
Uurimisrühm
Hariharan, R., Ghasempouri, T., Niazmand, B., Raik, J. From RTL liveness assertions to cost-effective hardware checkers // XXXIII Conference on Design of Circuits and Integrated Systems (DCIS) : proceedings. [S.l.] : IEEE, 2018. 6 p. : ill.