Ying, H., Jaiswal, A., Abd El Ghany, M. A., Hollstein, T., Hofmann, K.

täiskirje prindi

A simulation framework for 3-dimension networks-on-chip with different vertical channel density configurations

autor

Ying, Haoyuan

Jaiswal, Ashok

Abd El Ghany, Mohamed A

Hollstein, Thomas

Hofmann, Klaus

vastutusandmed

Haoyuan Ying, Ashok Jaiswal, Mohamed A Abd El Ghany, Thomas Hollstein and Klaus Hofmann

allikas

Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 18-20, 2012 Tallinn, Estonia

ilmumiskoht

[S. l.]

kirjastus/väljaandja

IEEE

ilmumisaasta

2012

leheküljed

p. 83-88 : ill

konverentsi nimetus, aeg

IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), April 18-20, 2012

konverentsi toimumispaik

Tallinn

ISBN

978-1-4673-1185-4

märkused

Bibliogr.: 37 ref

keel

inglise

Märksõnad ja võtmesõnad

märksõna

transistorid

kolmemõõtmeline ruum

integraallülitused

võtmesõna

3D NoC

vertical channel density (VD)

Performance

Power Delay Product (PDP)

Figure of Merit (FOM)

Ying, H., Jaiswal, A., Abd El Ghany, M. A., Hollstein, T., Hofmann, K. A simulation framework for 3-dimension networks-on-chip with different vertical channel density configurations // Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 18-20, 2012 Tallinn, Estonia. [S. l.] : IEEE, 2012. p. 83-88 : ill.