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hardware in the loop (võtmesõna)
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1
artikkel ajakirjas
A review on real‐time simulation and analysis methods of microgrids
Ahmadiahangar, Roya
;
Rosin, Argo
;
Nabavi Niaki, Ali
;
Palu, Ivo
;
Korõtko, Tarmo
International Transactions on Electrical Energy Systems
2019
/
art. e12106, 16 p. : ill
http://doi.org/10.1002/2050-7038.12106
artikkel ajakirjas
2
artikkel ajakirjas
Overview on digital twin for autonomous electrical vehicles propulsion drive system
Ibrahim, Mahmoud
;
Rassõlkin, Anton
;
Vaimann, Toomas
;
Kallaste, Ants
Sustainability
2022
/
art. 601
https://doi.org/10.3390/su14020601
artikkel ajakirjas
Kirjeid leitud 2, kuvan
1 - 2
pealkiri
117
1.
Concept of hardware-in-the-loop test platform for microgrid with multi-agent approach
2.
Hardware-in-the-loop simulation of motor drives for pumping applications
3.
Hardware-in-the-loop simulator of a flow control system for centrifugal pumps
4.
Hardware-in-the-loop simulator of vessel electric propulsion drive
5.
Modeling and analysis of pumping motor drives in hardware-in-the-loop environment
6.
PLC-based hardware-in-the-loop simulator of a centrifugal pump
7.
Hardware-in-the-Loop test of an open loop fuzzy control method for decoupled electro-hydraulic antilock braking system
8.
Bottlenecks in hardware design and design automation (Hardware synthesis: no pain, no gain)
9.
A frequency modulation in the phase-lock loop
10.
A light-induced shortcut in the planktonic microbial loop
11.
A method for design of the time optimal third order phase locked loop
12.
Adaptive transversal filter with adaptive non-linear feedback as a frequency-locked loop
13.
AP-1 transcription factors mediate BDNF-positive feedback loop in cortical neurons
14.
Closed-loop identification of fractional-order models using FOMCON toolbox for MATLAB
15.
Computation of open-loop frequency-domain characteristics of fractional FORDT plants with FOPID controllers
16.
Computational intelligence methods based design of closed-loop system
17.
CORDIC digital phase-locked loop for FM demodulation
18.
Design of retuning fractional PID controllers for a closed-loop magnetic levitation control system
19.
Development of single-loop current sensorless control for bidirectional three-phase PWM rectifier
20.
Deviation extension problems and nonlinear effects in the phase locked loop frequency demodulators
21.
Different ways for optimization of settling time of the 3rd order phase locked loop
22.
Digital implementation of retuning fractional controllers for an existing closed-loop magnetic levitation control system
23.
Digital realization of retuning fractional-order controllers for an existing closed-loop control system
24.
Forkhead transcription factor FOXO3a levels are increased in Huntington disease because of overactivated positive autofeedback loop
25.
Frequency-locked loop based on adaptive transversal filter
26.
Incorporation of fractional-order dynamics into an existing PI/PID DC motor control loop
27.
Instrumentation phase locked loop
28.
Map-based localization and loop-closure detection from a moving underwater platform using flow features
29.
Minimization of transient time in the third order phase-locked loop
30.
Model-based simulation of a hydraulic closed-loop rotary transmission with automatic control
31.
Multi-loop model reference adaptive control of fractional-order PID control systems
32.
Multi-Loop model reference proportional integral derivative controls: design and performance evaluations
33.
Role of third intracellular loop of galanin receptor type 1 in signal transduction
34.
Separation of independent components with partially overlapped spectra using signal-shape locked loop (SSLL) concept
35.
Signal distortion in the phase locked loop
36.
Simulation of the frequency and phase acquisition processes in the adaptive phase locked loop
37.
Some aspects of closed control loop design
38.
Some issues of integrating statistical models in quality loop
39.
Stem-loop structure of Cocksfoot mottle virus RNA is indispensable for programmed -1 ribosomal frameshifting
40.
Using signal filters in the PID loop
41.
A hardware/software co-design reconfigurable network-on-chip FPGA emulation method
42.
A Side-Channel Hardware Trojan in 65nm CMOS with 2μW precision and Multi-bit Leakage Capability
43.
An educational environment for digital testing : hardware, tools, and web-based runtime platform
44.
Analysis and comparison of attainable hardware acceleration in all programmable systems-on-chip
45.
Application-specific hardware accelerator for implementing recursive sorting algorithms
46.
Asynchronous e-learning resources for hardware design issues
47.
Bottlenecks in hardware design and design automation [Electronic resource] : [slides]
48.
Compact smart home systems : design and verification of cost effective hardware solutions
49.
Computing sorted subsets for data processing in communicating software/hardware control systems
50.
Determined-safe faults identification : a step towards ISO26262 hardware compliant designs
51.
DICE - an interactive approach to hardware/software co-design of heterogeneous real-time systems
52.
Digital hardware organization course for SoC program
53.
Fast iterative circuits and RAM-based mergers to accelerate data sort in software/hardware systems
54.
Fast processing of non-repeated values in hardware
55.
From RTL liveness assertions to cost-effective hardware checkers
56.
Hardware accelerators for information retrieval and data mining
57.
Hardware and software for expert and predictive estimations of ecological loads
58.
Hardware and software of the IGBT power converter
59.
Hardware close programming for freshmen
60.
Hardware implementation of face recognition using low precision representation
61.
Hardware implementation of recursive algorithms
62.
Hardware implementation of recursive sorting algorithms
63.
Hardware in Estonia
64.
Hardware modeling for design verification and debug = Riistvara modelleerimine disaini verifitseerimise ja silumise jaoks
65.
Hardware obfuscation of digital FIR filters
66.
Hardware/software co-design : state-of-the-art and future directions
67.
Hardware/software co-design for programmable systems-on-chip
68.
Hardware/software co-design in extensible processing platforms for combinatorial search algorithms
69.
Hardware/Software co-design in practice : MEMOCODE'08 contest experience
70.
Hardware-based systems for partial sorting of streaming data
71.
High-performance hardware accelerators for sorting and managing priorities
72.
Implementation of sorting algorithms in reconfigurable hardware
73.
Latest trends in hardware security and privacy
74.
Mapping the types of modularity in open-source hardware
75.
Microprocessors and microsystems : MICPRO : embedded hardware design
76.
Modular approach to training hardware design for modular teaching [Electronic resource]
77.
Mutations for testing hardware and correcting design errors
78.
Network-based hardware accelerators for parallel data processing = Võrgupõhised riistvarakiirendid paralleelseks andmetöötluseks
79.
Open source hardware cost-effective imaging sensors for high-throughput droplet microfluidic systems
80.
Optimization of recursive sorting algorithms for implementation in hardware
81.
pragmatic methodology for blind hardware trojan insertion in finalized layouts
82.
Processing N-ary trees in hardware circuits
83.
Processing N-ary trees in reconfigurable hardware
84.
Ransomware attack as Hardware Trojan : a feasibility and demonstration study
85.
Reusing verification assertions as security checkers for Hardware Trojan detection
86.
Simulation-based hardware verification with high-level decision diagrams = Simuleerimisel põhinev riistvara verifitseerimine kõrgtaseme otsustusdiagrammidel
87.
Software parser and analyser for hardware performance estimations
88.
Solving computationally intensive problems in reconfigurable hardware : a case study
89.
Special issue "Advanced hardware implementations for IoT systems and applications"
90.
survey on UAV computing platforms : a hardware reliability perspective
91.
zamiaCAD : open source platform for advanced hardware design
92.
zamiaCAD : understand, develop and debug hardware designs
93.
The hardware for artificial nose
94.
Trainer 1149 : a boundary scan simulation bundle with hardware support for labs
95.
Using of industry automation software and hardware in education and training
96.
Using soft-core processors and FPGA development boards for hardware emulation
97.
Using test pattern generation tool decider in hardware verification
98.
Brain-to-brain loop concept in application to porphyrias : 10-year experience at North Estonia Medical Centre
99.
Closed-loop control system design for wireless charging of low-voltage EV batteries with time-delay constraints
100.
Evolutionary design of the closed loop control on the basis of NN-ANARX model using genetic algorithm
101.
Functional diversity of human basic helix-loop-helix transcription factor TCF4 isoforms generated by alternative 5' exon usage and splicing
102.
Functions of the basic helix-loop-helix transcription factor TCF4 in health and disease = Aluselise heeliks-ling-heeliks transkriptsioonifaktori TCF4 funktsioonid ja seosed haigustega
103.
Isoform-specific reduction of the basic helix-Loop-helix transcription factor TCF4 levels in Huntington's disease
104.
Microbial loop annual variability through the water column gradients in the middle of the Gulf of Finland
105.
Model reference adaptive control scheme for retuning method-based fractional-order PID control with disturbance rejection applied to closed-loop control of a magnetic levitation system
106.
Model-based simulation of a hydraulic open-loop rotary transmission with automatic regulation of hydraulic motor (Part 1: Simulation)
107.
Model-based simulation of a hydraulic open-loop rotary transmission with automatic regulation of hydraulic motor (Part 2: Simulation)
108.
Signal-shape locked loop (SSLL) as an adaptive separator of cardiac and respiratory components of bio-impedance signal
109.
Towards an Intelligent Control System for district heating plants : design and implementation of a fuzzy logic based control loop
110.
Approaches to extra-functional verification of security and reliability aspects in hardware designs = Riistvaraprojektide turva- ja töökindlusaspektide ekstrafunktsionaalse verifitseerimise lähenemisviisid
111.
Can a HW development and research environment be convenient, scalable and free? zamiaCAD : open-source platform for hardware design and analysis : [invited talk]
112.
Cost-effective concurrent hardware checkers for network on chip based system on chip = Kulutõhusad süsteemiga paralleelsed rikkemonitorid kiipvõrkudel põhinevatele kiipsüsteemidele
113.
efficient analog convolutional neural network hardware accelerator enabled by a novel memoryless architecture for insect-sized robots
114.
Environmentally adaptive fish or no-fish classification for river video fish counters using high-performance desktop and embedded hardware
115.
Evaluation of control solution for grid inverter of low power wind turbine for implementation with inexpensive hardware
116.
Hardware imitation of the varying bioelectrical impedance for testing the device for measurement of the impedance of human trunk by using a JFET
117.
Hardware implementation of recursive sorting algorithms using tree-like structures and HFSM models = Rekursiivsete sortimisalgoritmide riistvaraline realiseerimine kasutades puulaadseid struktuure ja HFSM mudeleid
võtmesõna
44
1.
hardware in the loop
2.
hardware-in-the loop simulation
3.
Hardware-in-the-Loop simulation
4.
basic helix-loop-helix transcription factor
5.
basic helix–loop–helix transcription factor
6.
BDNF-positive feedback loop
7.
closed loop control
8.
closed loop systems
9.
closed-loop control
10.
closed-loop identification
11.
closed-loop PLM
12.
hydraulic closed-loop rotary transmission
13.
hysteresis loop
14.
loop-closure detection
15.
multi-loop model reference control
16.
open-loop stability
17.
positive feedback loop
18.
communicating hardware/software systems
19.
communicating software/hardware systems
20.
computer hardware
21.
crypto-hardware
22.
Embedded hardware
23.
hardware
24.
hardware accelerator
25.
hardware close programming
26.
hardware customization
27.
hardware design
28.
hardware for the IoT
29.
hardware implementation
30.
hardware Obfuscation
31.
hardware rejuvenation
32.
hardware security
33.
hardware security primitive
34.
hardware trojan horse
35.
hardware trojans
36.
hardware/software co-design
37.
open hardware
38.
open source hardware
39.
opensource hardware
40.
open-source hardware
41.
reconfigurable hardware
42.
software/hardware partitioning
43.
software/hardware systems
44.
special-purpose hardware
allikas
11
1.
Abstracts of International Conference : Loop'03 : Prague, 2003
2.
ASHES '21: Proceedings of the 5th Workshop on Attacks and Solutions in Hardware Security
3.
Asian-Pacific Conference on Hardware Description Langnages, Standards and Applications CAPCHDLSA-93, Australia
4.
CODES '14 : proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis
5.
IEEE Asian Hardware-Oriented Security and Trust (AsianHOST)
6.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2020
7.
System-level test and validation of hardware/software systems
8.
Workshop on Design Automation for Understanding Hardware Designs DUHDe 2015 : Grenoble, March 13, 2015
9.
2019 NASA/ESA conference on adaptive hardware and systems AHS 2019 : proceedings
10.
Design and Test Technology for Dependable Hardware/Software Systems : DEDIS/DAAD Summer Academy : BTU Cottbus, Sept. 1st-12th, 2008
11.
DUHDe : 1st Workshop on Design Automation for Understanding Hardware Designs : March 28, 2014 : Friday Workshop at DATE 2014, Dresden, Germany