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artikkel kogumikus

Address-based data processing over N-ary treesSklyarov, Valery; Skliarova, Iouliia; Kruus, Margus; Mihhailov, Dmitri; Sudnitsõn, AleksanderEuroCon 2013 : 01-04 July 2013, Zagreb, Croatia2013 / p. 1790-1797 : ill

artikkel kogumikus

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artikkel kogumikus

Application of extensible processing platforms for experiments with FPGA-based circuitsSklyarov, Valery; Skliarova, Iouliia; Silva, João; Rjabov, Artjom; Sudnitsõn, AleksanderMELECON 2014 : 2014 17th IEEE Mediterranean Electrotechnical Conference : 13-16 April 2014, Beirut, Lebanon2014 / p. 467-471 : ill

artikkel kogumikus

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dissertatsioon

Architecture of a list-based virtual machine for implementing COBOL : a thesis submitted to Tallinn Technical University in partial fulfilment of the requirements for the degree of master of engineering : magistritööTaveter, Kuldar1995 http://www.ester.ee/record=b1756467*est

dissertatsioon

4

artikkel kogumikus

Assessment of diagnostic test for automated bug localizationTihhomirov, Valentin; Tšepurov, Anton; Jenihhin, Maksim; Raik, Jaan; Ubar, Raimund-JohannesLATW2013 : 14th IEEE Latin-American Test Workshop, Cordoba, Argentina, April 3-5, 2013 : [proceedings]2013 / [6] p. : ill

artikkel kogumikus

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dissertatsioon

At-speed testing and test quality evaluation for high-performance pipelined systems Töökiirusel testimine ja testi kvaliteedi hindamine kõrgjõudlus-konveierarhitektuuriga süsteemideleGorev, Maksim2015 https://digi.lib.ttu.ee/i/?3953

dissertatsioon

6

artikkel kogumikus

At-speed testing of inter-die connections of 3D-SICs in the presence of shore logicShibin, Konstantin; Chickermane, Vivek; Keller, Brion; Papameletis, Christos; Marinissen, Erik Jan2015 Asian Test Symposium : ATS 2015 : 22-25 November 2015, Mumbai, Maharashtra, India : proceedings2015 / p. 79-84 : ill http://dx.doi.org/10.1109/ATS.2015.21

artikkel kogumikus

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artikkel ajakirjas

Automated design error debug using high-level decision diagrams and mutation operatorsRaik, Jaan; Repinski, Urmas; Tšepurov, Anton; Hantson, Hanno; Ubar, Raimund-Johannes; Jenihhin, MaksimMicroprocessors and microsystems2013 / p. 505-513 : ill

artikkel ajakirjas

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artikkel ajakirjas

Automated design error localization in RTL designsJenihhin, Maksim; Tšepurov, Anton; Tihhomirov, Valentin; Raik, Jaan; Hantson, Hanno; Ubar, Raimund-Johannes; Bartsch, Günter; Meza Escobar, Jorge Hernan; Wuttke, Heinz-DietrichIEEE design & test of computers2014 / p. 83-92 : ill http://dx.doi.org/10.1109/MDAT.2013.2271420

artikkel ajakirjas

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artikkel kogumikus

Automatic diagnosis of simple design errorsUbar, Raimund-Johannes; Borrione, DominiqueTIMA annual report 19981999 / p. 97-98

artikkel kogumikus

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artikkel kogumikus

Automatic diagnosis of simple design errorsUbar, Raimund-Johannes; Borrione, DominiqueTechniques of Informatics and Microelectronics for Computer Architecture1999 / p. 91

artikkel kogumikus

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artikkel kogumikus

Challenges for future system-on-chip designHollstein, Thomas; Peng, Zebo; Ubar, Raimund-Johannes; Glesner, ManfredCircuit Paradigm in the 21st Century : ECCTD '01 : proceedings of the 15th European Conference on Circuit Theory and Design : Helsinki University of Technology, Finland, 28th-31st August 2001. Vol 32001 / p. 173-176

artikkel kogumikus

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artikkel kogumikus

Code compaction within CGRAsTajammul, Muhammad Adeel; Jafri, Syed Mohammad Asad Hassan; Ellervee, PeeterProceedings of the 8th Annual Conference of the Estonian National Doctoral School in Information and Communication Technologies : December 5-6, 2014, Rakvere2014 / p. 133-136 : ill

artikkel kogumikus

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artikkel kogumikus

Customizable compression architecture for efficient configuration in CGRAsJafri, Syed Mohammad Asad Hassan; Ellervee, Peeter2014 IEEE 22nd International Symposium on Field-Programmable Custom Computing Machines : FCCM 2014 : 11-13 May 2014, Boston, Massachusetts, USA : proceedings2014 / p. 31 : ill

artikkel kogumikus

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artikkel kogumikus

Customization methodology of a Coarse Grained Reconfigurable ArchitectureAzad, Siavoosh Payandeh; Farahini, Nasim; Hemani, AhmedNorchip : 32nd NORCHIP Conference, 27-28 October 2014, Tampere, Finland2014 / [4] p. : ill

artikkel kogumikus

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artikkel ajakirjas

Deadlock-free generic routing algorithms for 3-dimensional Networks-on-Chip with reduced vertical link density topologiesYing, Haoyuan; Jaiswal, Ashok; Hollstein, Thomas; Hofmann, KlausJournal of systems architecture2013 / p. 528-542 : ill

artikkel ajakirjas

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artikkel kogumikus

Design space exploration in multi-level computing systemsSklyarov, Valery; Skliarova, Iouliia; Silva, João; Sudnitsõn, AleksanderCompSysTech'14 : 15th International Conference on Computer Systems and Technologies : Ruse, Bulgaria, June 27-28, 20142014 / p. 40-47 : ill

artikkel kogumikus

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raamat

Digitaalseadmete struktuuri projekteerimine : õppevahendAriste, Andri1978 https://www.ester.ee/record=b1305228*est

raamat

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artikkel kogumikus

An efficient FPGA-based architecture for contractive autoencodersKerner, Madis; Tammemäe, Kalle; Raik, Jaan; Hollstein, Thomas2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 3 – 6 May 2020, Fayetteville, Arkansas : proceedings2020 / p. 230−230 https://doi.org/10.1109/FCCM48280.2020.00062.

artikkel kogumikus

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artikkel kogumikus

Execution of dataflow process networks on OpenCL platformsLund, Wictor; Kanur, Sudeep; Ersfolk, Johan; Tsiopoulos, Leonidas23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing : PDP 2015 : 4-6 March 2015, Turku, Finland : proceedings2015 / p. 618-625 : ill https://doi.org/10.1109/PDP.2015.29

artikkel kogumikus

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artikkel kogumikus

Extensible open-source framework for translating RTL VHDL IP cores to SystemCSaif Abrar, Syed; Jenihhin, Maksim; Raik, JaanProceedings of the 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 8-10, 2013, Karlovy Vary, Czech Republic2013 / p. 112-115

artikkel kogumikus

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artikkel kogumikus

Fast and optimized task allocation method for low vertical link density 3-Dimensional Networks-on-Chip based many core systemsYing, Haoyuan; Hollstein, Thomas; Hofmann, KlausProceedings : Design, Automation & Test in Europe : Grenoble, France, March 18-22, 20132013 / p. 1777-1782 : ill

artikkel kogumikus

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artikkel ajakirjas

Fast iterative circuits and RAM-based mergers to accelerate data sort in software/hardware systemsSklyarov, Valery; Skliarova, Iouliia; Rjabov, Artjom; Sudnitsõn, AleksanderProceedings of the Estonian Academy of Sciences2017 / p. 323-335 : ill https://doi.org/10.3176/proc.2017.3.07 http://www.ester.ee/record=b2355998*est

artikkel ajakirjas

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artikkel ajakirjas

FPGA-based accelerators for parallel data sortSklyarov, Valery; Skliarova, Iouliia; Sudnitsõn, AleksanderApplied computer systems2014 / p. 53-63 : ill

artikkel ajakirjas

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artikkel ajakirjas

Functional self-test of high-performance pipe-lined signal processing architecturesGorev, Maksim; Ubar, Raimund-Johannes; Ellervee, Peeter; Devadze, Sergei; Raik, Jaan; Min, MartMicroprocessors and microsystems2015 / p. 909-918 : ill http://dx.doi.org/10.1016/j.micpro.2014.11.002

artikkel ajakirjas

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artikkel kogumikus

GSNoC — the comprehensive design platform for 3-dimensional Networks-on-Chip based many core embedded systemsYing, Haoyuan; Hollstein, Thomas; Hofmann, KlausProceedings of the 2013 International Conference on High Performance Computing & Simulation (HPCS 2013) : July 1-July 5, 2013, Helsinki, Finland2013 / p. 217-223 : ill

artikkel kogumikus

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