prindi

High-speed logic level fault simulation

autor
Ubar, Raimund-Johannes
Devadze, Sergei
vastutusandmed
Raimund Ubar, Sergei Devadze
allikas
Design and test technology for dependable systems-on-chip
ilmumiskoht
Hershey
kirjastus/väljaandja
Information Science Reference
ilmumisaasta
2011
leheküljed
p. 310-335 : ill
ISBN
978-1-60960-212-3
märkused
Bibliogr. p. 332-334
keel
inglise
Ubar, R., Devadze, S. High-speed logic level fault simulation // Design and test technology for dependable systems-on-chip. Hershey : Information Science Reference, 2011. p. 310-335 : ill.