Oyeniran, A.S., Ubar, R., Jenihhin, M., Raik, J.

Implementation-independent functional test generation for RISC microprocessors

author

Oyeniran, Adeboye Stephen

Ubar, Raimund-Johannes

Jenihhin, Maksim

Raik, Jaan

statement of authorship

Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik

source

VLSI-SoC 2019 : 27th IFIP/IEEE International Conference on Very Large Scale Integration : [proceedings]

location of publication

Piscataway

publisher

IEEE

year of publication

2019

pages

p. 82-87 : ill

conference name, date

27th IFIP/IEEE International Conference on Very Large Scale Integration, October 6-9, 2019

conference location

Cusco, Peru

url

https://doi.org/10.1109/VLSI-SoC.2019.8920323

subject term

mikroprotsessorid

testimine

rikked

tarkvara

keyword

microprocessor testing

high-level functional fault model

test generation

high-level fault coverage

fault redundancy

ISSN

2324-8440

2324-8432

ISBN

978-1-7281-3915-9

978-1-7281-3916-6

notes

Bibliogr.: 34 ref

TTÜ department

arvutisüsteemide instituut

language

inglise

Oyeniran, A.S., Ubar, R., Jenihhin, M., Raik, J. Implementation-independent functional test generation for RISC microprocessors // VLSI-SoC 2019 : 27th IFIP/IEEE International Conference on Very Large Scale Integration : [proceedings]. Piscataway : IEEE, 2019. p. 82-87 : ill. https://doi.org/10.1109/VLSI-SoC.2019.8920323