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book article

An Accelerator-based architecture utilizing an efficient memory link for modern computational requirementsYousefzadeh, Saba; Basharkhah, Katayoon; Raik, Jaan; Jenihhin, Maksim2019 IEEE East-West Design & Test Symposium (EWDTS)2019 / 6 p. : ill https://doi.org/10.1109/EWDTS.2019.8884481

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book article

A Double approximate neural hardware acceleratorNazari, Samira; Azarpeyvand, Ali; Ghasempouri, Tara2025 29th International Computer Conference Computer Society of Iran Csicc 20252025 / 5 p. https://ieeexplore.ieee.org/abstract/document/10967417 https://doi.org/10.1109/CSICC65765.2025.10967417 Article at Scopus

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3

book article

An efficient analog convolutional neural network hardware accelerator enabled by a novel memoryless architecture for insect-sized robotsDadras, Iman; Ahmadilivani, Mohammad Hasan; Banerji, Saoni; Raik, Jaan; Abloo, Alvo2022 11th International Conference on Modern Circuits and Systems Technologies (MOCAST) : Bremen, Germany : 08-10 June 20222022 / p. 1-6 https://doi.org/10.1109/MOCAST54814.2022.9837551

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4

journal article EST / journal article ENG

Elliptic-curve crypto processor for RFID applicationsRashid, Muhammad; Jamal, Sajjad Shaukat; Khan, Sikandar Zulqarnain; Alharbi, Adel R.; Aljaedi, Amer; Imran, MalikApplied Sciences (Switzerland)2021 / art. 7079 https://doi.org/10.3390/app11157079 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

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5

book article

Fully-fusible convolutional neural networks for end-to-end fused architecture with FPGA implementationDadras, Iman; Seydi, Sakineh; Ahmadilivani, Mohammad Hasan; Raik, Jaan; Salehi, Mostafa E.2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS)2023 / 5 p. https://doi.org/10.1109/ICECS58634.2023.10382831

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book article

Hardware accelerators for information retrieval and data miningSklyarov, Valery; Skliarova, Iouliia; Silva, João; Sudnitsõn, Aleksander; Rjabov, Artjom2015 International Conference on Information and Communication Technology Research (ICTRC2015) : Abu Dhabi, United Arab Emirates, May 17-19, 20152015 / p. 202-205 : ill http://dx.doi.org/10.1109/ICTRC.2015.7156457

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7

book article EST / book article ENG

Heterogeneous Approximation of DNN HW Accelerators based on Channels VulnerabilityCherezova, Natalia; Pappalardo, Salvatore; Taheri, Mahdi; Ahmadilivani, Mohammad Hasan; Deveautour, Bastien; Bosio, Alberto; Raik, Jaan; Jenihhin, Maksim2024 IFIP/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC)2024 / 4 p. : ill https://doi.org//10.1109/VLSI-SoC62099.2024.10767798 Conference proceedings at Scopus Article at Scopus

book article EST / book article ENG
Related publications 1
- Methods for reliability assessment and enhancement of deep neural networks hardware accelerators = Süvanärvivõrkude riistvara kiirendite töökindluse hindamine ja täiustamine
8

journal article EST / journal article ENG

High-speed design of postquantum cryptography with optimized hashing and multiplicationImran, Malik; Aikata, Aikata; Roy, Sujoy Sinha; Pagliarini, Samuel NascimentoIEEE Transactions on Circuits and Systems II : Express Briefs2023 / p. 847-851 : ill https://doi.org//10.1109/TCSII.2023.3273821 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG
Related publications 1
- Hardware realization of lattice-based post-quantum cryptography = Võrel põhinev post-kvant-krüptograafia riistvaraline realisatsioon
9

book article

SAFFIRA: a Framework for Assessing the Reliability of Systolic-Array-Based DNN AcceleratorsTaheri, Mahdi; Daneshtalab, Masoud; Raik, Jaan; Jenihhin, Maksim; Pappalardo, Salvatore; Jimenez, Paul; Deveautour, Bastien; Bosio, Alberto2024 27th International Symposium on Design & Diagnostics of Electronic Circuits & Systems (DDECS) : 03-05 April 2024, Kielce, Poland2024 / p. 19–24 : ill https://doi.org/10.1109/DDECS60919.2024.10508925 Article at Scopus Article at WOS

book article
Related publications 1
- Methods for reliability assessment and enhancement of deep neural networks hardware accelerators = Süvanärvivõrkude riistvara kiirendite töökindluse hindamine ja täiustamine

Number of records 9, displaying 1 - 9

1. DNN hardware accelerator
2. hardware accelerator
3. DNN hardware accelerators
4. accelerator
5. accelerator architectures
6. accelerator-based architecture
7. crypto accelerator
8. DNN accelerator
9. electron linear accelerator
10. linear accelerator
11. particle accelerator
12. plasma accelerator
13. communicating hardware/software systems
14. communicating software/hardware systems
15. computer hardware
16. Computer software and hardware
17. crypto-hardware
18. Embedded hardware
19. hardware
20. hardware acceleration
21. hardware close programming
22. hardware customization
23. hardware design
24. hardware for the IoT
25. hardware implementation
26. hardware in the loop
27. hardware Obfuscation
28. hardware problems
29. hardware rejuvenation
30. hardware reliability
31. hardware security
32. hardware security primitive
33. Hardware Trojan
34. hardware trojan horse
35. Hardware Trojan Horses
36. hardware trojans
37. Hardware Trojans (HT)
38. Hardware Verification
39. hardware/software co-design
40. hardware-in-the loop simulation
41. hardware-in-the-loop
42. Hardware-in-the-Loop simulation
43. hardware-software integration in robotics
44. integer-only hardware
45. open hardware
46. open source hardware
47. opensource hardware
48. open-source hardware
49. power-hardware-in-the-loop
50. reconfigurable hardware
51. software/hardware partitioning
52. software/hardware systems
53. special-purpose hardware
54. trustworthy hardware

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