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book article

An Accelerator-based architecture utilizing an efficient memory link for modern computational requirementsYousefzadeh, Saba; Basharkhah, Katayoon; Raik, Jaan; Jenihhin, Maksim2019 IEEE East-West Design & Test Symposium (EWDTS)2019 / 6 p. : ill https://doi.org/10.1109/EWDTS.2019.8884481

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book article

An efficient analog convolutional neural network hardware accelerator enabled by a novel memoryless architecture for insect-sized robotsDadras, Iman; Ahmadilivani, Mohammad Hasan; Banerji, Saoni; Raik, Jaan; Abloo, Alvo2022 11th International Conference on Modern Circuits and Systems Technologies (MOCAST) : Bremen, Germany : 08-10 June 20222022 / p. 1-6 https://doi.org/10.1109/MOCAST54814.2022.9837551

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journal article EST / journal article ENG

Elliptic-curve crypto processor for RFID applicationsRashid, Muhammad; Jamal, Sajjad Shaukat; Khan, Sikandar Zulqarnain; Alharbi, Adel R.; Aljaedi, Amer; Imran, MalikApplied Sciences (Switzerland)2021 / art. 7079 https://doi.org/10.3390/app11157079 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

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4

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Fully-fusible convolutional neural networks for end-to-end fused architecture with FPGA implementationDadras, Iman; Seydi, Sakineh; Ahmadilivani, Mohammad Hasan; Raik, Jaan; Salehi, Mostafa E.2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS)2023 / 5 p. https://doi.org/10.1109/ICECS58634.2023.10382831

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5

book article

Hardware accelerators for information retrieval and data miningSklyarov, Valery; Skliarova, Iouliia; Silva, João; Sudnitsõn, Aleksander; Rjabov, Artjom2015 International Conference on Information and Communication Technology Research (ICTRC2015) : Abu Dhabi, United Arab Emirates, May 17-19, 20152015 / p. 202-205 : ill http://dx.doi.org/10.1109/ICTRC.2015.7156457

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6

journal article

High-speed design of postquantum cryptography with optimized hashing and multiplicationImran, Malik; Aikata, Aikata; Roy, Sujoy Sinha; Pagliarini, Samuel NascimentoIEEE Transactions on Circuits and Systems II : Express Briefs2023 / p. 847-851 : ill https://doi.org//10.1109/TCSII.2023.3273821

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Related publications 1
- Hardware realization of lattice-based post-quantum cryptography = Võrel põhinev post-kvant-krüptograafia riistvaraline realisatsioon

Number of records 6, displaying 1 - 6

1. DNN hardware accelerator
2. hardware accelerator
3. accelerator
4. accelerator architectures
5. accelerator-based architecture
6. crypto accelerator
7. electron linear accelerator
8. linear accelerator
9. particle accelerator
10. plasma accelerator
11. communicating hardware/software systems
12. communicating software/hardware systems
13. computer hardware
14. Computer software and hardware
15. crypto-hardware
16. Embedded hardware
17. hardware
18. hardware acceleration
19. hardware close programming
20. hardware customization
21. hardware design
22. hardware for the IoT
23. hardware implementation
24. hardware in the loop
25. hardware Obfuscation
26. hardware problems
27. hardware rejuvenation
28. hardware reliability
29. hardware security
30. hardware security primitive
31. Hardware Trojan
32. hardware trojan horse
33. Hardware Trojan Horses
34. hardware trojans
35. Hardware Verification
36. hardware/software co-design
37. hardware-in-the loop simulation
38. hardware-in-the-loop
39. Hardware-in-the-Loop simulation
40. integer-only hardware
41. open hardware
42. open source hardware
43. opensource hardware
44. open-source hardware
45. power-hardware-in-the-loop
46. reconfigurable hardware
47. software/hardware partitioning
48. software/hardware systems
49. special-purpose hardware
50. trustworthy hardware

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