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51
book article
LFSR polynomial and seed selection using genetic algorithm
Aleksejev, E.
;
Jutman, Artur
;
Ubar, Raimund-Johannes
BEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference
2006
/
p. 179-182 : ill
book article
52
book article
Logic simulation and fault collapsing with shared structurally synthesized BDDs
Mironov, Dmitri
;
Ubar, Raimund-Johannes
;
Raik, Jaan
2014 19th IEEE European Test Symposium (ETS) : May 26th-30th, 2014, Paderborn, Germany : proceedings
2014
/
[2] p. : ill
book article
53
book article
Lower bounds of the size of shared structurally synthesized BDDs
Ubar, Raimund-Johannes
;
Mironov, Dmitri
Proceedings of the 2014 IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 23-25, 2014, Warsaw, Poland
2014
/
p. 77-82 : ill
book article
54
book article
Macro level defect-oriented diagnosability of digital circuits
Kostin, Sergei
;
Ubar, Raimund-Johannes
;
Raik, Jaan
BEC 2010 : 2010 12th Biennial Baltic Electronics Conference : proceedings of the 12th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 4-6, 2010, Tallinn, Estonia
2010
/
p. 149-152 : ill
book article
55
book article
Macro level defect-oriented diagnosability of digital circuits
Kostin, Sergei
;
Ubar, Raimund-Johannes
;
Raik, Jaan
Info- ja kommunikatsioonitehnoloogia doktorikooli IKTDK neljanda aastakonverentsi artiklite kogumik : 26.-27. novembril 2010, Essu mõis
2010
/
lk. 53-56 : ill
book article
56
book article
Mixed-level defect simulation in data-paths of digital systems
Ubar, Raimund-Johannes
;
Raik, Jaan
;
Ivask, Eero
;
Brik, Marina
23rd International Conference on Microelectronics : MIEL 2002, Niš, Yugoslavia, 12-15 May 2002 : proceedings. Volume 2
2002
/
p. 617-620 : ill
https://ieeexplore.ieee.org/document/1003333
book article
57
book article
Modeling sequential circuits with shared structurally synthesized BDDs
Ubar, Raimund-Johannes
;
Marenkov, Mihhail
;
Mironov, Dmitri
;
Viies, Vladimir
Proceedings of 2014 9th International Design & Test Symposium (IDT) : Sheraton Club des Pins Hotel, Algiers, Algeria, December 16-18, 2014
2014
/
p. 130-135 : ill
book article
58
book article
Multi-level test generation and fault diagnosis for finite state machines
Ubar, Raimund-Johannes
;
Brik, Marina
Dependable computing : proceedings / EDCC-2, Second European Dependable Computing Conference, Taormina, Italy, October 2-4, 1996
1996
/
p. 264-281: ill
book article
59
book
Multi-level test generation and fault diagnosis in digital systems
Ubar, Raimund-Johannes
1992
book
60
book article
Multi-valued simulation of digital circuits
Ubar, Raimund-Johannes
Proceedings : 1997 21st International Conference on Microelectronics : Niš, Yugoslavia, 14-17 September 1997. Vol. 2
1997
/
p. 721-724 : ill
book article
61
book article
New technique for hierarchical identification of untestable faults in sequential circuits
Krivenko, Anna
;
Ubar, Raimund-Johannes
;
Raik, Jaan
;
Kruus, Margus
Info- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja
2008
/
lk. 155-158 : ill
book article
62
book article
A novel random approach to diagnostic test generation
Osimiry, Emmanuel Ovie
;
Ubar, Raimund-Johannes
;
Kostin, Sergei
;
Raik, Jaan
2nd IEEE NORCAS Conference : 1-2 November 2016, Copenhagen, Denmark
2016
/
[4] p. : ill
https://doi.org/10.1109/NORCHIP.2016.7792915
book article
63
dissertation
Optimization of built-in self-test in digital systems = Sisseehitatud enesetestimise optimeerimine digitaalsüsteemides
Kruus, Helena
2011
dissertation
64
book article
Overview of the modular system for inference of finite state machines
Spitšakova, Margarita
Info- ja kommunikatsioonitehnoloogia doktorikooli IKTDK seitsmenda aastakonverentsi artiklite kogumik : 15.-16. novembril 2013, Haapsalu
2013
/
p. 95-98 : ill
book article
65
book article
Parallel fault backtracing for calculation of fault coverage
Ubar, Raimund-Johannes
;
Devadze, Sergei
;
Raik, Jaan
;
Jutman, Artur
43rd International Conference on Microelectronics, Devices and Materials and the Workshop on Electronic Testing : September 12. - September 14.2007, Bled, Slovenia : MIDEM conference 2007 proceedings
2007
/
p. 165-170 : ill
https://www.researchgate.net/publication/221153650_Parallel_fault_backtracing_for_calculation_of_fault_coverage
book article
66
book
Parallel processing in FPGA-based digital circuits and systems
Sklyarov, Valery
;
Skliarova, Iouliia
2013
http://www.ester.ee/record=b2946103*est
book
67
book article
Parallel X-fault simulation with critical path tracing technique [Electronic resource]
Ubar, Raimund-Johannes
;
Devadze, Sergei
;
Raik, Jaan
;
Jutman, Artur
DATE 10 : Design, Automation & Test in Europe : Dresden, Germany, 8-12 March, 2010
2010
/
p. 879-884 [CD-ROM]
https://www.researchgate.net/publication/221341788_Parallel_X-fault_simulation_with_critical_path_tracing_technique
book article
68
book article
Practical works for on-line teaching design and test of digital circuits
Jutman, Artur
;
Ubar, Raimund-Johannes
;
Hahanov, V.
;
Skvortsova, O.
The 9th IEEE International Conference on Electronics, Circuits and Systems : ICECS 2002 : September 15-18, 2002, Dubrovnik, Croatia. Volume III
2002
/
p. 1223-1226 : ill
http://dx.doi.org/10.1109/ICECS.2002.1046474
book article
69
book article
Recursion and hierarchy in digital design and prototyping : a case study
Mihhailov, Dmitri
;
Kruus, Margus
;
Sklyarov, Valery
;
Skliarova, Iouliia
;
Sudnitsõn, Aleksander
Computer Systems and Technologies : 12th International Conference, CompSysTech'11 : Vienna, Austria, June 16-17, 2011 : proceedings
2011
/
p. 45-50 : ill
https://dl.acm.org/doi/pdf/10.1145/2023607.2023616
book article
70
book article
Representing logical inference steps with digital circuits
Matsak, Erika
Human interface and the management of information : information and interaction
2009
/
p. 178-184
https://link.springer.com/chapter/10.1007/978-3-642-02559-4_20
book article
71
book article
Research on digital system design and test at Tallinn University of Technology
Ubar, Raimund-Johannes
;
Ellervee, Peeter
;
Hollstein, Thomas
;
Jervan, Gert
;
Jutman, Artur
;
Kruus, Margus
;
Raik, Jaan
Research in Estonia : present and future
2011
/
p. 184-205 : ill
book article
72
book
Riistvara kirjeldamiskeel - VHDL : metoodiline materjal
Tammemäe, Kalle
2003
http://www.ester.ee/record=b1605950*est
book
73
book
Riistvara kirjeldamiskeel VHDL : metoodiline materjal
Tammemäe, Kalle
2002
http://www.ester.ee/record=b1605950*est
book
74
dissertation
Self-diagnosis in digital systems = Isediagnoosivad digitaalsüsteemid
Kostin, Sergei
2012
https://www.ester.ee/record=b2757857*est
dissertation
75
book article
Sequential circuits BIST synthesis from signal specifications
Raik, Jaan
;
Jenihhin, Maksim
;
Adelbert, Rain
Proceedings 23rd NORCHIP Conference : Oulu, Finland, 21-22 November 2005
2005
/
p. 196-199 : ill
https://ieeexplore.ieee.org/document/1597023
book article
Number of records 92, displaying
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