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Interpretable quantitative description of the digital clock drawing test for Parkinson's disease modellingNõmm, Sven; Mašarov, Ilja; Toomela, Aaro; Medijainen, Kadri; Taba, Pille15th International Conference on Control, Automation, Robotics and Vision (ICARCV 2018) : Singapore, November 18-21, 20182018 / p. 1839-1844 : ill https://doi.org/10.1109/ICARCV.2018.8581074

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Latch-Based logic lockingSweeney, J.; Mohammed Zackriya, V.; Pagliarini, Samuel Nascimento; Pileggi, LarryProceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, HOST 20202020 / p. 132−141 : ill https://doi.org/10.1109/HOST45689.2020.9300256

book article

SCAAT: Secure cache alternative address table for mitigating cache logical side-channel attacksShalabi, Ameer; Ghasempouri, Tara; Ellervee, Peeter; Raik, Jaan2020 23rd Euromicro Conference on Digital System Design (DSD), 26-28 August 2020, Kranj, Slovenia2020 / art, 20035366, p. 213−217 https://doi.org/10.1109/DSD51259.2020.00043

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