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An area aware accelerator for elliptic curve point multiplicationImran, Malik; Pagliarini, Samuel Nascimento; Rashid, Muhammad Haroon27th IEEE International Conference on Electronics Circuits and Systems, (ICECS) 2020, Glasgow, UK, Virtual Conference, November 23-25, 2020 : proceedings2020 / 4 p https://doi.org/10.1109/ICECS49266.2020.9294908

book article

2

book article

Benchmarking advanced security closure of physical layoutsEslami, Mohammad; Knechtel, Johann; Sinanoglu, Ozgur; Karri, Ramesh; Pagliarini, Samuel NascimentoISPD '23 : proceedings of the 2023 International Symposium on Physical Design2023 / p. 256-264 https://doi.org/10.1145/3569052.3578924 https://dl.acm.org/doi/pdf/10.1145/3569052.3578924

book article

Seotud publikatsioonid 1

On the use of defensive schemes for hardware security = Kaitseskeemid riistvara turvalisuse tagamiseks

3

journal article

CAC 2.0 : a corrupt and correct logic locking technique resilient to structural analysis attacksAksoy, Levent; Yasin, Muhammad; Pagliarini, Samuel NascimentoarXiv.org2024 / 6 p. : ill https://doi.org/10.48550/arXiv.2401.07142

journal article

4

journal article

Chip-to-Chip authentication method based on SRAM PUF and public key cryptographyKarageorgos, Ioannis; Isgenc, Mehmet Meric; Pagliarini, Samuel Nascimento; Pileggi, LarryJournal of hardware and systems security2019 / p. 382–396 : ill https://doi.org/10.1007/s41635-019-00080-y

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5

book article

Design obfuscation versus testFarahmandi, Farimah; Sinanoglu, Ozgur; Blanton, Ronald; Pagliarini, Samuel Nascimento2020 IEEE European Test Symposium (ETS) : ETS 2020, May 25 - 29, 2020, Tallinn, Estonia2020 / 10 p https://doi.org/10.1109/ETS48528.2020.9131590

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6

book article

Design space exploration of SABER in 65nm ASICImran, Malik; Almeida, Felipe; Raik, Jaan; Basso, Andrea; Roy, Sujoy Sinha; Pagliarini, Samuel NascimentoASHES '21 : proceedings of the 5th Workshop on Attacks and Solutions in Hardware Security2021 / p. 85-90 https://doi.org/10.1145/3474376.3487278

book article

Seotud publikatsioonid 1

Hardware realization of lattice-based post-quantum cryptography = Võrel põhinev post-kvant-krüptograafia riistvaraline realisatsioon

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journal article EST / journal article ENG

Evaluating architectural, redundancy, and implementation strategies for radiation hardening of FinFET integrated circuitsPagliarini, Samuel Nascimento; Benites, Luis; Martins, Mayler; Rech, Paolo; Kastensmidt, FernandaIEEE transactions on nuclear science2021 / p. 1045-1053 https://doi.org/10.1109/TNS.2021.3070643 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

8

journal article EST / journal article ENG

An experimental study of building blocks of lattice-based NIST post-quantum cryptographic algorithmsImran, Malik; Abideen, Zain Ul; Pagliarini, Samuel NascimentoElectronics2020 / art. 1953, 26 p. : ill https://doi.org/10.3390/electronics9111953 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

Seotud publikatsioonid 1

Hardware realization of lattice-based post-quantum cryptography = Võrel põhinev post-kvant-krüptograafia riistvaraline realisatsioon

9

book article

From FPGAs to obfuscated eASICs : design and security trade-offsAbideen, Zain Ul; Perez, Tiago Diadami; Pagliarini, Samuel NascimentoIEEE Asian Hardware-Oriented Security and Trust (AsianHOST)2021 / p. 1-4 https://doi.org/10.1109/AsianHOST53231.2021.9699758

book article

Seotud publikatsioonid 1

Leveraging FPGA Reconfigurability as an Obfuscation Asset = FPGA ümberkonfigureeritavuse rakendamine hägustamise vahendina

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journal article

From virtual characterization to test-chips : DFM analysis through pattern enumerationMartins, Mayler G.A.; Pagliarini, Samuel Nascimento; Isgenc, Mehmet Meric; Pileggi, LarryIEEE transactions on computer-aided design of integrated circuits and systems2020 / p. 520-532 https://doi.org//10.1109/TCAD.2018.2889772

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book article

G-GPU : a fully-automated generator of GPU-like ASIC acceleratorsPerez, Tiago Diadami; Gonçalves, Marcio M.; Gobatto, Leonardo; Brandalero, Marcelo; Azambuja, Jose Rodrigo; Pagliarini, Samuel Nascimento2022 Design, Automation & Test in Europe Conference & Exhibition (DATE) : 14-23 March 2022 : Antwerp, Belgium2022 / p. 544 - 547 https://doi.org/10.23919/DATE54114.2022.9774758

book article

Seotud publikatsioonid 1

Security-aware physical synthesis of integrated circuits = Integraallülituste turvateadlik füüsiline süntees

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book article

Hardware obfuscation of digital FIR filtersAksoy, Levent; Hepp, Alexander; Baehr, Johanna; Pagliarini, Samuel Nascimento2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) : Prague, Czech Republic : April 6-8, 2022 : proceedings2022 / p. 68-73 https://doi.org/10.48550/arXiv.2202.10022 https://doi.org/10.1109/DDECS54261.2022.9770141

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13

dissertation

Hardware realization of lattice-based post-quantum cryptography = Võrel põhinev post-kvant-krüptograafia riistvaraline realisatsioonImran, Malik2023 https://www.ester.ee/record=b5571216*est https://doi.org/10.23658/taltech.33/2023 https://digikogu.taltech.ee/et/Item/75aeb070-cb8b-4511-beaf-cbea3fca147d https://www.ester.ee/record=b5571216*est

dissertation

Seotud publikatsioonid 6

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journal article EST / journal article ENG

Hardware trojan insertion in finalized layouts : from methodology to a silicon demonstrationPerez, Tiago Diadami; Pagliarini, Samuel NascimentoIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems2023 / p. 2094-2107 https://doi.org/10.1109/TCAD.2022.3223846 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

Seotud publikatsioonid 1

Security-aware physical synthesis of integrated circuits = Integraallülituste turvateadlik füüsiline süntees

15

book article

Hardware Trojans for confidence reduction and misclassifications on neural networksGrailoo, Mahdieh; Leier, Mairo; Pagliarini, Samuel NascimentoProceedings Of The Twenty Third International Symposium On Quality Electronic Design (ISQED 2022)2022 / art. 180541, p. 230-235 https://doi.org/10.1109/ISQED54688.2022.9806246

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16

book article

High-level intellectual property obfuscation via decoy constantsAksoy, Levent; Nguyen, Quang-Linh; Almeida, Felipe; Raik, Jaan; Flottes, Marie-Lise; Dupuis, Sophie; Pagliarini, Samuel Nascimento2021 IEEE 27th International Symposium on On-Line Testing and Robust System Design (IOLTS) : Torino, Italy, 28-30 June 20212021 / p. 1-7 https://doi.org/10.1109/IOLTS52814.2021.9486714

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journal article

High-speed design of postquantum cryptography with optimized hashing and multiplicationImran, Malik; Aikata, Aikata; Roy, Sujoy Sinha; Pagliarini, Samuel NascimentoIEEE Transactions on Circuits and Systems II : Express Briefs2023 / p. 847-851 : ill https://doi.org//10.1109/TCSII.2023.3273821

journal article

Seotud publikatsioonid 1

Hardware realization of lattice-based post-quantum cryptography = Võrel põhinev post-kvant-krüptograafia riistvaraline realisatsioon

18

journal article EST / journal article ENG

High-speed SABER key encapsulation mechanism in 65nm CMOSImran, Malik; Almeida, Felipe; Basso, Andrea; Roy, Sujoy Sinha; Pagliarini, Samuel NascimentoJournal of cryptographic engineering2023 / p. 461-471 : ill https://doi.org/10.1007/s13389-023-00316-2 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

Seotud publikatsioonid 1

Hardware realization of lattice-based post-quantum cryptography = Võrel põhinev post-kvant-krüptograafia riistvaraline realisatsioon

19

journal article EST / journal article ENG

Hybrid protection of digital FIR filtersAksoy, Levent; Nguyen, Quang-Linh; Almeida, Felipe; Raik, Jaan; Flottes, Marie-Lise; Dupuis, Sophie; Pagliarini, Samuel NascimentoIEEE transactions on Very Large Scale Integration (VLSI) Systems2023 / p. 812-825 : ill https://doi.org/10.1109/TVLSI.2023.3253641 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

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journal article

Impact of orientation on the bias of SRAM-based PUFsAbideen, Zain Ul; Wang, Rui; Perez, Tiago Diadami; Schrijen, Geert-Jan; Pagliarini, Samuel NascimentoarXiv.org2023 / 7 p. : ill https://doi.org/10.48550/arXiv.2308.06730

journal article

Seotud publikatsioonid 1

Leveraging FPGA Reconfigurability as an Obfuscation Asset = FPGA ümberkonfigureeritavuse rakendamine hägustamise vahendina

21

journal article

Impact of orientation on the bias of SRAM-based PUFsAbideen, Zain Ul; Wang, Rui; Perez, Tiago Diadami; Schrijen, Geert-Jan; Pagliarini, Samuel NascimentoIEEE design & test2024 / p. 14-20 https://doi.org/10.1109/MDAT.2023.3322621

journal article

Seotud publikatsioonid 1

Leveraging FPGA Reconfigurability as an Obfuscation Asset = FPGA ümberkonfigureeritavuse rakendamine hägustamise vahendina

22

journal article EST / journal article ENG

KaLi: a crystal for post-quantum security using kyber and dilithiumAikata, Aikata; Mert, Ahmet Can; Imran, Malik; Pagliarini, Samuel Nascimento; Roy, Sujoy SinhaIEEE Transactions on Circuits and Systems I : regular papers2023 / p. 747–758 https://doi.org/10.1109/TCSI.2022.3219555 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

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journal article

KRATT : QBF-assisted removal and structural analysis attack against logic lockingAksoy, Levent; Yasin, Muhammad; Pagliarini, Samuel NascimentoarXiv.org2023 / 7 p. : ill https://doi.org/10.48550/arXiv.2311.05982

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book article

Latch-Based logic lockingSweeney, J.; Mohammed Zackriya, V.; Pagliarini, Samuel Nascimento; Pileggi, LarryProceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, HOST 20202020 / p. 132−141 : ill https://doi.org/10.1109/HOST45689.2020.9300256

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book article

Latest trends in hardware security and privacyDi Natale, Giorgio; Regazzoni, Francesco; Albanese, Vincent; Lhermet, Frank; Loisel, Yann; Sensaoui, Abderrahmane; Pagliarini, Samuel Nascimento33rd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) : ESA-ESRIN, Italy (On-line Virtual Event),October 19–21, 20202020 / 4 p. : ill https://doi.org/10.1109/DFT50435.2020.9250816

book article

Pagliarini, Samuel Nascimento (author)

types of item

author 19

CV 3

name of the person 2

keyword 2

subject term 1