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book article
Accurate NBTI-induced gate delay modeling based on intensive SPICE simulations
Kostin, Sergei
;
Raik, Jaan
;
Ubar, Raimund-Johannes
;
Jenihhin, Maksim
MEDIAN Finale : Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale : November 10-11, 2015, Tallinn, Estonia
2015
/
p. 21-26 : ill
book article
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keyword
42
1.
gate delay
2.
Field Programmable Gate Array (FPGA)
3.
field programmable gate arrays
4.
field-programmable gate array
5.
Field-Programmable Gate Array (FPGA)
6.
field-programmable gate arrays
7.
FPGA (field-programmable gate array)
8.
GaTe
9.
gate and register transfer levels
10.
gate driver
11.
Gate Injection Transistor (GIT)
12.
gate-level analysis
13.
gate-level circuit abstraction
14.
gate-level netlist
15.
Golden gate assembly
16.
insulated gate bipolar transistors
17.
insulated gate-commutated thyristors
18.
NBTI-critical gate
19.
Opal Kelly field programmable gate array (FPGA)
20.
register transfer and gate level simulation
21.
communication delay
22.
communication delay time
23.
delay
24.
delay monad
25.
Delay systems
26.
delay-aware optimization
27.
digital delay
28.
ETE Delay
29.
fractional delay differential equations
30.
interlayer delay
31.
interval time delay
32.
NBTI-induced path delay estimation
33.
non-robust and functional sensitization of delay faults
34.
Power Delay Product (PDP)
35.
propagation delay
36.
service delay
37.
thermal delay
38.
time delay
39.
time delay systems
40.
time-delay renewable power systems
41.
time-delay systems
42.
transition delay faults
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