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digitaaltehnika (subject term)
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101
journal article
Mixed-level test generator for digital systems
Brik, Marina
;
Jervan, Gert
;
Markus, Antti
;
Paomets, Priidu
;
Raik, Jaan
;
Ubar, Raimund-Johannes
Proceedings of the Estonian Academy of Sciences. Engineering
1997
/
4, p. 271-282 : ill
journal article
102
dissertation
Model synthesis from VHDL for the functional test generation system
Krupnova, Helena
1993
https://www.ester.ee/record=b2090509*est
dissertation
103
newspaper article
MS Estonia ferry investigation continues, no additional funds yet allocated [Online resources]
Linnart, Mart
news.err.ee
2022
MS Estonia ferry investigation continues, no additional funds yet allocated
newspaper article
104
book article
Multi-level fault simulation of digital systems on decision diagrams
Ubar, Raimund-Johannes
;
Raik, Jaan
;
Ivask, Eero
;
Brik, Marina
The First IEEE International Workshop on Electronic Design, Test and Applications : DELTA 2002, 29-31 January 2002, Christchurch, New Zealand : proceedings
2002
/
p. 86-91 : ill
book article
105
book
Multi-level test generation and fault diagnosis in digital systems
Ubar, Raimund-Johannes
1992
book
106
book article
Multi-level test generation for digital systems at system, circuit and defect levels
Ubar, Raimund-Johannes
Proceedings of the 7th International Scientific Conference "Theory and Technique of Information Transmission, Reception and Processing" : Tuapse, October 1-4, 2001
2001
/
p. 286-288
book article
107
book article
Multiple fault testing in systems-on-chip with high-level decision diagrams
Ubar, Raimund-Johannes
;
Oyeniran, Adeboye Stephen
;
Schölzel, Mario
;
Vierhaus, Heinrich Theodor
Proceedings of 2015 10th International Design & Test Symposium (IDT) : Dead Sea, Jordan, 14-16 December 2015
2015
/
p. 66-71 : ill
http://dx.doi.org/10.1109/IDT.2015.7396738
book article
108
book article
Multivalued simulation on AG-model of digital devices
Ubar, Raimund-Johannes
;
Voolaine, Andrus
Proceedings of the 12th Conference on Fault-Tolerant Systems and Diagnostics, Prague, Czechoslovakia, September, 1989
1989
/
p. 101-104
book article
109
book article
Mutation analysis for systemC designs at TLM
Guarnieri, Valerio
;
Bombieri, Nicola
;
Pravadelli, Graziano
;
Fummi, Franco
;
Hantson, Hanno
;
Raik, Jaan
;
Jenihhin, Maksim
;
Ubar, Raimund-Johannes
12th IEEE Latin American Test Workshop (LATW) : Porto de Galinhas, Brasil, 27-30 March 2011
2011
/
[6] p
https://ieeexplore.ieee.org/document/5985925
book article
110
dissertation
Mutation-based verification and error correction in high-level designs = Mutatsioonidel põhinev verifitseerimine ja vigade parandamine kõrgtaseme skeemides
Hantson, Hanno
2015
https://www.ester.ee/record=b4518212*est
dissertation
111
newspaper article
Mõtteid koostöö võimalikkusest Ida-Lääne piiril
Ubar, Raimund-Johannes
;
Kruus, Margus
Mente et Manu
2003
/
20. okt., lk. 2 : portr
https://artiklid.elnet.ee/record=b1415646*est
newspaper article
112
book article
New method of testability calculation to guide RT-level test generation
Raik, Jaan
;
Nõmmeots, Tanel
;
Ubar, Raimund-Johannes
4th IEEE Latin-American Test Workshop : LATW2003 : Natal, Brazil, February 16-19, 2003
2003
/
p. 46-51 : ill
https://link.springer.com/article/10.1007/s10836-005-5288-5
book article
113
journal article EST
/
journal article ENG
Optimization of boundary scan tests using FPGA-based efficient scan architectures
Aleksejev, Igor
;
Devadze, Sergei
;
Jutman, Artur
;
Shibin, Konstantin
Journal of electronic testing : theory and applications (JETTA)
2016
/
p. 245-255 : ill
https://doi.org/10.1007/s10836-016-5588-y
Journal metrics at Scopus
Article at Scopus
Journal metrics at WOS
Article at WOS
journal article EST
/
journal article ENG
114
book article
Optimization of memory-constrained hybrid BIST for testing core-based systems
Jervan, Gert
;
Kruus, Helena
;
Orasson, Elmet
;
Ubar, Raimund-Johannes
Proceedings of the IEEE 2nd International Symposium on Industrial Embedded Systems : SIES'2007 : Lisbon, Portugal, 4-6 July 2007
2007
/
p. 71-77
https://ieeexplore.ieee.org/document/4297319
book article
115
book article
Optimization of memory-constrained hybrid BIST for testing core-based systems
Jervan, Gert
;
Kruus, Helena
;
Orasson, Elmet
;
Ubar, Raimund-Johannes
Info- ja kommunikatsioonitehnoloogia doktorikooli IKTDK teise aastakonverentsi artiklite kogumik : 11.-12. mai 2007, Viinistu kunstimuuseum
2007
/
lk. 133-136 : ill
book article
116
journal article
Overview about low-level and high-level decision diagrams for diagnostic modeling of digital systems
Ubar, Raimund-Johannes
Facta Universitatis [Niš]. Series electronics and energetics
2011
/
p. 303-324 : ill
http://dx.doi.org/10.2298/FUEE1103303U
journal article
117
book article
Overview about low-lewel and high-level decision diagrams for diagnostic modeling of digital systems
Ubar, Raimund-Johannes
Proceedings of the Reed-Muller 2011 Workshop : May 25-26, 2011, Tuusula, Finland
2011
/
p. 1-10 : ill
https://scindeks-clanci.ceon.rs/data/pdf/0353-3670/2011/0353-36701103303U.pdf
book article
118
book article
Overview of e-learning environment for web-based study of testing and diagnostics of digital systems
Jutman, Artur
;
Ubar, Raimund-Johannes
;
Wuttke, Heinz-Dietrich
Microelectronics education : proceedings of the 5th European Workshop on Microelectronics Education, held in Lausanne, Switzerland, April 15-16, 2004
2004
/
p. 253-258 : ill
https://link.springer.com/chapter/10.1007/978-1-4020-2651-5_41
book article
119
book article
Overview of e-learning environment for web-based study of testing and diagnostics of digital systems
Jutman, Artur
;
Ubar, Raimund-Johannes
;
Wuttke, Heinz-Dietrich
5th European Workshop on Microelectronics Education - EWME 2004, Lausanne, 2004
2004
/
p. 173-176
https://link.springer.com/chapter/10.1007/978-1-4020-2651-5_41
book article
120
book article
Parallel fault simulation in digital circuits
Aarna, Margit
;
Raik, Jaan
;
Ubar, Raimund-Johannes
Proc. of 42nd International Scientific Conference of Riga Technical University
2001
/
p. 91-94
book article
121
journal article
Parallel fault simulation in digital circuits
Aarna, Margit
;
Raik, Jaan
;
Ubar, Raimund-Johannes
Scientific proceedings of Riga Technical University. 7. serija, Telecommunications and electronics
2001
/
p. 91-94 : ill
journal article
122
book article
Probabilistic equivalence checking based on high-level decision diagrams
Karputkin, Anton
;
Ubar, Raimund-Johannes
;
Tombak, Mati
;
Raik, Jaan
Proceedings of the 2011 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems : April 13-15, 2011, Gottbus, Germany
2011
/
p. 423-428 : ill
https://ieeexplore.ieee.org/document/5783130
book article
123
book article
PSL assertions based verification with HLDD tools
Jenihhin, Maksim
Info- ja kommunikatsioonitehnoloogia doktorikooli IKTDK teise aastakonverentsi artiklite kogumik : 11.-12. mai 2007, Viinistu kunstimuuseum
2007
/
lk. 17-20 : ill
book article
124
book article
Register transfer low power design based on controller decomposition
Sudnitsõn, Aleksander
MIEL 2004 : 24th International Conference on Microelectronics : Niš, Serbia and Montenegro, 16-19 May 2004 : proceedings. Volume 2
2004
/
p. 735-738 : ill
https://ieeexplore.ieee.org/document/1314937
book article
125
book article
Research environment for teaching digital test
Ivask, Eero
;
Jutman, Artur
;
Orasson, Elmet
;
Raik, Jaan
;
Ubar, Raimund-Johannes
;
Wuttke, Heinz-Dietrich
Synergies between Information and Automation : 49. Internationales Wissenschaftliches Kolloquium, 27.-30.9.2004, Technische Universität Ilmenau, Germany. Volume 2
2004
/
p. 468-473 : ill
https://pld.ttu.ee/dildis/publications/IWK'2004_res_inv.pdf
book article
Number of records 207, displaying
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