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Fault model and test synthesis for RISC-processors (title)
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book article
Fault model and test synthesis for RISC-processors
Ubar, Raimund-Johannes
;
Markus, Antti
;
Jervan, Gert
;
Raik, Jaan
BEC'96 : the 5th Biennial Baltic Electronics Conference, October 7-11, 1996, Tallinn, Estonia : proceedings
1996
/
p. 229-232: ill
book article
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keyword
18
1.
RISC processors
2.
RISC-V processors
3.
test generation and fault diagnosis
4.
fault analysis model
5.
functional fault model
6.
high-level control fault model
7.
high-level fault model
8.
high-level functional fault model
9.
stuck-at fault model
10.
Automated Synthesis of Software-based Self-test
11.
high-level synthesis for test
12.
test path synthesis
13.
Model test
14.
test model design
15.
digital signal processors
16.
RISC processor testing
17.
RISC-V
18.
RISC-V Security Verification
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