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76

journal article

Mixed-level test generator for digital systemsBrik, Marina; Jervan, Gert; Markus, Antti; Paomets, Priidu; Raik, Jaan; Ubar, Raimund-JohannesProceedings of the Estonian Academy of Sciences. Engineering1997 / 4, p. 271-282 : ill

journal article

77

dissertation

Model synthesis from VHDL for the functional test generation systemKrupnova, Helena1993 https://www.ester.ee/record=b2090509*est

dissertation

78

newspaper article

MS Estonia ferry investigation continues, no additional funds yet allocated [Online resources]Linnart, Martnews.err.ee2022 MS Estonia ferry investigation continues, no additional funds yet allocated

newspaper article

79

book article

Multi-level fault simulation of digital systems on decision diagramsUbar, Raimund-Johannes; Raik, Jaan; Ivask, Eero; Brik, MarinaThe First IEEE International Workshop on Electronic Design, Test and Applications : DELTA 2002, 29-31 January 2002, Christchurch, New Zealand : proceedings2002 / p. 86-91 : ill

book article

80

book

Multi-level test generation and fault diagnosis in digital systemsUbar, Raimund-Johannes1992

book

81

book article

Multiple fault testing in systems-on-chip with high-level decision diagramsUbar, Raimund-Johannes; Oyeniran, Adeboye Stephen; Schölzel, Mario; Vierhaus, Heinrich TheodorProceedings of 2015 10th International Design & Test Symposium (IDT) : Dead Sea, Jordan, 14-16 December 20152015 / p. 66-71 : ill http://dx.doi.org/10.1109/IDT.2015.7396738

book article

82

book article

Multivalued simulation on AG-model of digital devicesUbar, Raimund-Johannes; Voolaine, AndrusProceedings of the 12th Conference on Fault-Tolerant Systems and Diagnostics, Prague, Czechoslovakia, September, 19891989 / p. 101-104

book article

83

dissertation

Mutation-based verification and error correction in high-level designs = Mutatsioonidel põhinev verifitseerimine ja vigade parandamine kõrgtaseme skeemidesHantson, Hanno2015

dissertation

84

newspaper article

Mõtteid koostöö võimalikkusest Ida-Lääne piirilUbar, Raimund-Johannes; Kruus, MargusMente et Manu2003 / 20. okt., lk. 2 : portr https://artiklid.elnet.ee/record=b1415646*est

newspaper article

85

journal article

Optimization of boundary scan tests using FPGA-based efficient scan architecturesAleksejev, Igor; Devadze, Sergei; Jutman, Artur; Shibin, KonstantinJournal of electronic testing : theory and applications (JETTA)2016 / p. 245-255 : ill http://dx.doi.org/10.1007/s10836-016-5588-y

journal article

86

book article

Optimization of memory-constrained hybrid BIST for testing core-based systemsJervan, Gert; Kruus, Helena; Orasson, Elmet; Ubar, Raimund-JohannesInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK teise aastakonverentsi artiklite kogumik : 11.-12. mai 2007, Viinistu kunstimuuseum2007 / lk. 133-136 : ill

book article

87

journal article

Overview about low-level and high-level decision diagrams for diagnostic modeling of digital systemsUbar, Raimund-JohannesFacta Universitatis [Niš]. Series electronics and energetics2011 / p. 303-324 : ill http://dx.doi.org/10.2298/FUEE1103303U

journal article

88

book article

Overview about low-lewel and high-level decision diagrams for diagnostic modeling of digital systemsUbar, Raimund-JohannesProceedings of the Reed-Muller 2011 Workshop : May 25-26, 2011, Tuusula, Finland2011 / p. 1-10 : ill

book article

89

book article

Overview of e-learning environment for web-based study of testing and diagnostics of digital systemsJutman, Artur; Ubar, Raimund-Johannes; Wuttke, Heinz-DietrichMicroelectronics education : proceedings of the 5th European Workshop on Microelectronics Education, held in Lausanne, Switzerland, April 15-16, 20042004 / p. 253-258 : ill https://link.springer.com/chapter/10.1007/978-1-4020-2651-5_41

book article

90

book article

Overview of e-learning environment for web-based study of testing and diagnostics of digital systemsJutman, Artur; Ubar, Raimund-Johannes; Wuttke, Heinz-Dietrich5th European Workshop on Microelectronics Education - EWME 2004, Lausanne, 20042004 / p. 173-176 https://link.springer.com/chapter/10.1007/978-1-4020-2651-5_41

book article

91

book article

Parallel fault simulation in digital circuitsAarna, Margit; Raik, Jaan; Ubar, Raimund-JohannesProc. of 42nd International Scientific Conference of Riga Technical University2001 / p. 91-94

book article

92

journal article

Parallel fault simulation in digital circuitsAarna, Margit; Raik, Jaan; Ubar, Raimund-JohannesScientific proceedings of Riga Technical University. 7. serija, Telecommunications and electronics2001 / p. 91-94 : ill

journal article

93

book article

PSL assertions based verification with HLDD toolsJenihhin, MaksimInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK teise aastakonverentsi artiklite kogumik : 11.-12. mai 2007, Viinistu kunstimuuseum2007 / lk. 17-20 : ill

book article

94

book article

Register transfer low power design based on controller decompositionSudnitsõn, AleksanderMIEL 2004 : 24th International Conference on Microelectronics : Niš, Serbia and Montenegro, 16-19 May 2004 : proceedings. Volume 22004 / p. 735-738 : ill https://ieeexplore.ieee.org/document/1314937

book article

95

journal article

Research in digital design and test at Tallinn University of TechnologyUbar, Raimund-Johannes; Jervan, Gert; Jutman, Artur; Raik, Jaan; Ellervee, Peeter; Kruus, MargusRadioelectronics & informatics2008 / p. 4-12 : ill http://www.ewdtest.com/ri/%E2%84%96-1-40-january-march-2008/

journal article

96

book article

Research on digital system design and test at Tallinn University of TechnologyUbar, Raimund-Johannes; Ellervee, Peeter; Hollstein, Thomas; Jervan, Gert; Jutman, Artur; Kruus, Margus; Raik, JaanResearch in Estonia : present and future2011 / p. 184-205 : ill

book article

97

book

Ringhääling '99 : VI Rahvusvahelise Telekommunikatsioonipäeva konverentsi ettekannete materjalid1999 https://www.ester.ee/record=b1260725*est

book

98

book

Ringhääling 2003 : X rahvusvahelise telekommunikatsioonipäeva materjalid : [16. mai 2003, Tallinn]2003 http://www.ester.ee/record=b1782571*est

book

99

book article

Scalable algorithm for structural fault collapsing in digital circuitsUbar, Raimund-Johannes; Jürimägi, Lembit; Orasson, Elmet; Raik, Jaan2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) : October 5-7, 2015, Daejeon, Korea2015 / p. 171-176 : ill

book article

100

journal article

Second IEEE East-West Design and Test WorkshopHahanov, Vladimir; Ubar, Raimund-JohannesIEEE journal of design & test of computers2004 / p. 594

journal article

digitaaltehnika (subject term)

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