Blyzniuk, M., Kazymyra, I., Kuzmicz, W., Pleskacz, W.A., Raik, J., Ubar, R.-J.

full record print

Probabilistic analysis of CMOS physical defects in VLSI circuits for test coverage improvement

author

Blyzniuk, M.

Kazymyra, I.

Kuzmicz, W.

Pleskacz, Witold A.

Raik, Jaan

Ubar, Raimund-Johannes

statement of authorship

M.Blyzniuk, I.Kazymyra, W.Kuzmicz, W.A.Pleskacz, J.Raik, R.Ubar

source

Microelectronics reliability

journal volume number month

Vol. 41

year of publication

2001

pages

p. 2023-2040 : ill

url

https://www.sciencedirect.com/science/article/pii/S0026271401000920

ISSN

0026-2714

notes

Bibliogr.: 31 ref

language

inglise

Märksõnad ja võtmesõnad

subject term

tõenäosus

analüüs

VLSI-ahelad

defektid

Blyzniuk, M., Kazymyra, I., Kuzmicz, W., Pleskacz, W.A., Raik, J., Ubar, R.-J. Probabilistic analysis of CMOS physical defects in VLSI circuits for test coverage improvement // Microelectronics reliability (2001) Vol. 41, p. 2023-2040 : ill. https://www.sciencedirect.com/science/article/pii/S0026271401000920