FSMD RTL design manipulation for clock interface abstraction
vastutusandmed
Syed Saif Abrar, Maksim Jenihhin, Jaan Raik
allikas
2015 International Conference on Advances in Computing, Communications and Informatics (ICACCI) : 10-13 August 2015, Kerala, India
ilmumiskoht
[S.l.]
kirjastus/väljaandja
ilmumisaasta
leheküljed
p. 463-468 : ill
konverentsi nimetus, aeg
2015 International Conference on Advances in Computing, Communications and Informatics (ICACCI), 10-13 August, 2015
konverentsi toimumispaik
Kerala, India
ISBN
978-1-4799-8790-0
märkused
Bibliogr.: 22 ref
TTÜ struktuuriüksus
keel
inglise
märksõna
võtmesõna
Register Transfer Level - RTL
Algorithmic State Machine - ASM
Finite State Machine - FSM
Abrar, S.S., Jenihhin, M., Raik, J. FSMD RTL design manipulation for clock interface abstraction // 2015 International Conference on Advances in Computing, Communications and Informatics (ICACCI) : 10-13 August 2015, Kerala, India. [S.l.] : IEEE, 2015. p. 463-468 : ill.