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CMOS defects analysis using DefSim measurement environmentPleskacz, Witold A.; Borejko, Tomasz; Walkanis, A.; Stopjakova, Viera; Jutman, Artur; Ubar, Raimund-JohannesInformal Digest of Papers : Eleventh IEEE European Test Symposium : ETS 2006 : 21-24 May 2006, Southampton, United Kingdom2006 / p. 241-246 : ill

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DefSim: a remote laboratory for studying physical defects in CMOS digital circuitsPleskacz, Witold A.; Stopjakova, Viera; Borejko, Tomasz; Jutman, Artur; Walkanis, AndrzejIEEE transactions on industrial electronics2008 / 6, p. 2405-2415 : ill https://www.researchgate.net/publication/3219964_DefSim_A_Remote_Laboratory_for_Studying_Physical_Defects_in_CMOS_Digital_Circuits

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DefSim: CMOS defects on chip for research and educationPleskacz, Witold A.; Borejko, Tomasz; Walkanis, A.; Stopjakova, Viera; Jutman, Artur; Ubar, Raimund-Johannes7th IEEE Latin American Test Workshop LATW'06 : Buenos Aires, Argentina, March 26th-29th, 2006 : proceedings2006 / p. 74-79 : ill

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DefSim: measurement environment for CMOS defectsBorejko, Tomasz; Jutman, Artur; Pleskacz, Witold A.; Ubar, Raimund-Johannes2006 25th International Conference on Microelectronics : Belgrade, Serbia and Montenegro, 14-17 May 2006 : proceedings. Volume 22006 / p. 679-682 https://ieeexplore.ieee.org/document/1651048

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Borejko, Tomasz (autor)

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