Localization of single-gate design errors in combinational circuits by diagnostic information about stuck-at faults

Ubar, R., Borrione, D. Localization of single-gate design errors in combinational circuits by diagnostic information about stuck-at faults // Proceedings of the 2nd International Workshop on Design and Diagnostics of Electronic Circuits and Systems, Szczyrk, Poland, September 2-4, 1998. [S.l.], 1998. p. 73-79.