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Test time minimization for hybrid BIST of core-based systemsJervan, Gert; Eles, Petru; Peng, Zebo; Ubar, Raimund-Johannes; Jenihhin, Maksim12th Asian Test Symposium (ATS 2003) : 17-19 November 2003, Xian, China2003 / p. 318-325 : ill https://link.springer.com/article/10.1007/s11390-006-0907-x

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177

journal article

Test time minimization for hybrid BIST of core-based systemsJervan, Gert; Eles, Petru; Peng, Zebo; Ubar, Raimund-Johannes; Jenihhin, MaksimJournal of computer science and technology2006 / 6, p. 907-912 : ill https://link.springer.com/article/10.1007/s11390-006-0907-x

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178

book article

Test time minimization for hybrid BIST with test pattern broadcastingUbar, Raimund-Johannes; Jenihhin, Maksim; Jervan, Gert; Peng, ZeboIEEE NORCHIP 2003 : 21 Norchip Conference : Riga, Latvia, 10-11 November 2003 : proceedings2003 / p. 112-116 : ill https://www.ida.liu.se/labs/eslab/publications/pap/db/norchip03.pdf

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179

journal article EST / journal article ENG

The CMS fast beam condition monitor for HL-LHCAuzinger, G.; Bakhshiansohi, H.; Dabrowski, A.; Delannoy, A.G.; Dierlamm, A.; Dragicevic, M.; Gholami, A.; Gomez, G.; Jenihhin, Maksim; Shibin, KonstantinJournal of instrumentation2024 / art. C03048, 10 p. : ill https://doi.org/10.1088/1748-0221/19/03/C03048 Conference proceedings at Scopus Article at Scopus Conference proceedings at WOS Article at WOS

journal article EST / journal article ENG

180

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The validation of graph model-based, gate level low-dimensional feature data for machine learning applicationsBalakrishnan, Aneesh; Lange, Thomas; Glorieux, Maximilien; Alexandrescu, Dan; Jenihhin, Maksim2019 IEEE Nordic Circuits and Systems Conference (NORCAS) : NORCHIP and International Symposium of System-on-Chip (SoC), 29-30 October 2019, Helsinki, Finland : proceedings in IEEE Xplore2019 / 7 p https://doi.org/10.1109/NORCHIP.2019.8906974

book article

Related publications 1

A synthetic, hierarchical approach for modelling and managing complex systems' quality and reliability = Sünteetiline, hierarhiline lähenemine keerukate süsteemide kvaliteedi ja töökindluse modelleerimiseks ja haldamiseks

181

book article

Timing-critical path analysis with structurally synthesized BDDsUbar, Raimund-Johannes; Jürimägi, Lembit; Jenihhin, Maksim; Raik, Jaan; Olugbenga, Niyi-Leigh; Viies, Vladimir2018 7th Mediterranean Conference on Embedded Computing (MECO)2018 / 6 p. : ill https://doi.org/10.1109/MECO.2018.8406051

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182

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Towards multidimensional verification : where functional meets non-functionalJenihhin, Maksim; Lai, Xinhui; Ghasempouri, Tara; Raik, Jaan2018 IEEE Nordic Circuits and Systems Conference (NORCAS) : NORCHIP and International Symposium of System-on-Chip (SoC) : 30-31 October 2018, Tallinn, Estonia : proceedings in IEEE Xplore2018 / 7 p. : ill https://doi.org/10.1109/NORCHIP.2018.8573495

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Related publications 1

Approaches to extra-functional verification of security and reliability aspects in hardware designs = Riistvaraprojektide turva- ja töökindlusaspektide ekstrafunktsionaalse verifitseerimise lähenemisviisid

183

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True path tracing in structurally synthesized BDDs for testability analysis of digital circuitsUbar, Raimund-Johannes; Jürimägi, Lembit; Oyeniran, Adeboye Stephen; Jenihhin, MaksimEuromicro Conference on Digital System Design : DSD 2019 : 28 - 30 August 2019 Kallithea, Chalkidiki, Greece : proceedings2019 / p. 492-499 : ill https://doi.org/10.1109/DSD.2019.00077

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184

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TTBist: a DfT tool for enhancing functional test for SoCHermann, K.; Raik, Jaan; Jenihhin, MaksimBEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference2006 / p. 191-194 : ill

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185

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2018 IEEE Nordic Circuits and Systems Conference (NORCAS) : NORCHIP and International Symposium of System-on-Chip (SoC) : 30-31 October 2018, Tallinn, Estonia : proceedings in IEEE Xplore [Online resource]2018 https://ieeexplore.ieee.org/xpl/conhome/8552599/proceeding

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186

newspaper article

Töökindla arvutusriistvara keskuse juht Maksim JenihhinJenihhin, Maksimforte.delfi.ee2024 Töökindla arvutusriistvara keskuse juht Maksim Jenihhin

newspaper article

187

journal article

Tööstusdoktorantuur projektis RESCUEJenihhin, MaksimMente et Manu2017 / lk. 21 http://www.ester.ee/record=b1242496*est

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188

journal article EST / journal article ENG

Understanding fault-tolerance vulnerabilities in advanced SoC FPGAs for critical applicationsCherezova, Natalia; Shibin, Konstantin; Jenihhin, Maksim; Jutman, ArturMicroelectronics reliability2023 / art. 115010, 10 p. : ill https://doi.org/10.1016/j.microrel.2023.115010 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

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189

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Understanding multidimensional verification : where functional meets non-functionalLai, Xinhui; Balakrishnan, Aneesh; Lange, Thomas; Jenihhin, Maksim; Ghasempouri, Tara; Raik, Jaan; Alexandrescu, DanMicroprocessors and microsystems2019 / art. 102867, 13 p. : ill https://doi.org/10.1016/j.micpro.2019.102867 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

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Related publications 2

190

book article

Universal mitigation of NBTI-induced aging by design randomizationJenihhin, Maksim; Kamkin, Alexander; Navabi, Zainalabedin; Sadeghi-Kohan, SomayehProceedings of 2016 IEEE East-West Design & Test Symposium (EWDTS) : Yerevan, Armenia, October 14-17, 20162017 / [5] p. : ill http://dx.doi.org/10.1109/EWDTS.2016.7807635

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191

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Unsupervised recycled FPGA detection using symmetry analysisTarique, Tanvir Ahmad; Ahmed, Foisal; Jenihhin, Maksim; Ali, Liakot12th International Conference on Electrical and Computer Engineering : ICECE 20222022 / p. 437-440 https://doi.org/10.1109/ICECE57408.2022.10088856

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192

book article

Upgrading QoSinNoC : efficient routing for mixed-criticality applications and power analysisAvramenko, Serhiy; Azad, Siavoosh Payandeh; Violante, Massimo; Niazmand, Behrad; Raik, Jaan; Jenihhin, MaksimProceedings of the 2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) : October 8-10, 2018, Verona, Italy2018 / p. 207-212 : ill https://doi.org/10.1109/VLSI-SoC.2018.8644866

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193

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Using simulation statistics for bug localization in RTL designsTihhomirov, Valentin; Jenihhin, Maksim; Raik, JaanInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK seitsmenda aastakonverentsi artiklite kogumik : 15.-16. novembril 2013, Haapsalu2013 / p. 107-110 : ill

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194

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Wafer-level die re-test success prediction using machine learningSelg, Hardi; Jenihhin, Maksim; Ellervee, Peeter21st IEEE Latin-American Test Symposium (LATS) 2020 : proceedings2020 / 5 p https://doi.org/10.1109/LATS49555.2020.9093672

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195

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VHDL design debug framework based on zamiaCADTihhomirov, Valentin; Tšepurov, Anton; Saif Abrar, Syed; Jenihhin, Maksim; Raik, JaanDATE 2013 : Design Automation and Test in Europe, March 18-22, 2013, Grenoble, France2013 / [1] p. : ill

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196

newspaper article

Китайский ИИ сталкивается с ограничениями на Западе: введут ли их в Эстонии?Kappi, A-M.rus.postimees.ee2025 Китайский ИИ сталкивается с ограничениями на Западе: введут ли их в Эстонии?

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197

newspaper article

Профессор TalTech: закон об ИИ стал первым комплексным инструментом для защиты прав гражданJenihhin, Maksimrus.err.ee2025 Профессор TalTech: закон об ИИ стал первым комплексным инструментом для защиты прав гражданautor

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198

newspaper article

«Сейчас время больших перемен»: профессор TalTech приоткрыл завесу тайны развития ИИ в ЭстонииGrebneva, N.; Jenihhin, Maksimrus.postimees.ee2025 «Сейчас время больших перемен»: профессор TalTech приоткрыл завесу тайны развития ИИ в Эстонии

newspaper article

Jenihhin, Maksim (author)

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author 17

CV 9

name of the person 7