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101

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Keynote: cost-efficient reliability for Edge-AI chipsJenihhin, Maksim; Taheri, Mahdi; Cherezova, Natalia; Ahmadilivani, Mohammad Hasan; Selg, Hardi; Jutman, Artur; Shibin, Konstantin; Tsertov, Anton; Devadze, Sergei; Kodamanchili, Rama Mounika; Rafiq, Ahsan; Raik, Jaan; Daneshtalab, Masoud2024 IEEE 25th Latin American Test Symposium (LATS)2024 / 2 p https://doi.org/10.1109/LATS62223.2024.10534610 Article at Scopus

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Related publications 1

Methods for reliability assessment and enhancement of deep neural networks hardware accelerators = Süvanärvivõrkude riistvara kiirendite töökindluse hindamine ja täiustamine

102

book article

Layout to logic defect analysis for hierarchical test generationJenihhin, Maksim; Raik, Jaan; Ubar, Raimund-Johannes; Pleskacz, Witold A.; Rakowski, MichalProceedings of the 2007 IEEE Workshop on Design and Diagnostic Circuits and Systems : April 11-13, 2007, Krakow, Poland2007 / p. 35-40 : ill http://dx.doi.org/10.1109/DDECS.2007.4295251

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103

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Localization of bugs in processor designs using zamiaCAD frameworkTšepurov, Anton; Tihhomirov, Valentin; Jenihhin, Maksim; Raik, Jaan13th International Workshop on Microprocessor Test and Verification (MTV 2012) Common Challenges and Solutions : Austin, USA, December 10–12, 20122012 / p. 1-6 https://ieeexplore.ieee.org/document/6519733

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104

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Measuring and identifying aging-critical paths in FPGAsPfeifer, Petr; Raik, Jaan; Jenihhin, Maksim; Ubar, Raimund-Johannes; Pliva, ZdenekMEDIAN 2015 : the 4th Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale : March 13, 2015, Grenoble, France2015 / p. 56-61 : ill

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105

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A methodology for automated mining of compact and accurate assertion setsHeidari Iman, Mohammad Reza; Raik, Jaan; Jenihhin, Maksim; Jervan, Gert; Ghasempouri, Tara2021 IEEE Nordic Circuits and Systems Conference (NorCAS) : Oslo, Norway, October 26-272021 / 7 p. : ill https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9599865 https://doi.org/10.1109/NorCAS53631.2021.9599865

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106

dissertation

Methods for reliability assessment and enhancement of deep neural networks hardware accelerators = Süvanärvivõrkude riistvara kiirendite töökindluse hindamine ja täiustamineTaheri, Mahdi2025 https://www.ester.ee/record=b5728368*est https://digikogu.taltech.ee/et/Item/9cf79768-17bc-44ec-a828-e4ccf6cf93f1 https://doi.org/10.23658/taltech.4/2025

dissertation

Related publications 14

107

dissertation

Methods to optimize functional safety assessment for automotive integrated circuits = Meetodid autotööstuse kiipide funktsionaalse ohutuse hindamise optimeerimiseksBagbaba, Ahmet Cagri2022 https://doi.org/10.23658/taltech.9/2022 https://digikogu.taltech.ee/et/Item/58b0b89d-b1ba-4a73-ba53-850910d697b5 https://www.ester.ee/record=b5491885*est

dissertation

Related publications 10

108

journal article

Mixed hierarchical-functional fault models for targeting sequential coresRaik, Jaan; Ubar, Raimund-Johannes; Viilukas, Taavi; Jenihhin, MaksimJournal of systems architecture2008 / 3/4, p. 465-477 : ill https://www.sciencedirect.com/science/article/abs/pii/S1383762107001166

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109

book article

Mixed-level identification of fault redundancy in microprocessorsOyeniran, Adeboye Stephen; Ubar, Raimund-Johannes; Jenihhin, Maksim; Gürsoy, Cemil Cem; Raik, JaanLATS 2019 : 20th IEEE Latin American Test Symposium : Santiago, Chile, March 11th - 13th 20192019 / 6 p. : ill https://doi.org/10.1109/LATW.2019.8704591

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110

book article

ML-based online design error localization for RISC-V implementationsSelg, Hardi; Jenihhin, Maksim; Ellervee, Peeter; Raik, Jaan2023 IEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS) : IOLTS 2023 : July 3rd-5th, 2023, Platanias, Chania (Crete), Greece : proceedings2023 / 7 p. https://doi.org/10.1109/IOLTS59296.2023.10224864

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111

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MLC: a machine learning based checker for soft error detection in embedded processorsNosrati, Nooshin; Jenihhin, Maksim; Navabi, ZainalabedinProceedings - 2022 IEEE 28th International Symposium on On-Line Testing and Robust System Design, IOLTS 20222022 / Code 183305 https://doi.org/10.1109/IOLTS56730.2022.9897309 Article at Scopus Article at WOS

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112

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Modeling for multi-view interference analysis of design aspects in MPSoC designsVain, Jüri; Apneet Kaur; Tsiopoulos, Leonidas; Raik, Jaan; Jenihhin, MaksimRESCUE 2017 : Workshop on Reliability, Security and Quality : ETS17 Fringe Workshop, May 25-26, 2017, Limassol, Cyprus2017 / p. 1-6 http://www.ets17.org.cy/workshop/rescue-workshop.html

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113

book article

Modeling gate-level abstraction hierarchy using graph convolutional neural networks to predict functional de-rating factorsBalakrishnan, Aneesh; Lange, Thomas; Glorieux, Maximilien; Alexandrescu, Dan; Jenihhin, Maksim2019 NASA/ESA conference on adaptive hardware and systems AHS 2019 : proceedings2019 / p. 72-78 : ill https://doi.org/10.1109/AHS.2019.00007

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Related publications 1

A synthetic, hierarchical approach for modelling and managing complex systems' quality and reliability = Sünteetiline, hierarhiline lähenemine keerukate süsteemide kvaliteedi ja töökindluse modelleerimiseks ja haldamiseks

114

book article

Modeling microprocessor faults on high-level decision diagrams [Electronic resource]Ubar, Raimund-Johannes; Raik, Jaan; Jutman, Artur; Jenihhin, Maksim; Istenberg, Martin; Wuttke, Heinz-DietrichDSN 2008 : supplemental : 2008 IEEE International Conference on Dependable Systems & Networks With FTCS & DCC (DSN) : June 24-27, 2008, Anchorage, Alaska2008 / p. C17-C22 : ill. [CD-ROM] https://webhost.laas.fr/TSF/WDSN08/2ndWDSN08(LAAS)_files/Slides/WDSN08S-04-Ubar.pdf

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115

book article

Modeling soft-error reliability under variabilityBalakrishnan, Aneesh; Cardoso Medeiros, Guilherme; Gürsoy, Cemil Cem; Hamdioui, Said; Jenihhin, Maksim; Alexandrescu, Dan2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) : 6-8 Oct. 20212021 / p. 1-6 https://doi.org/10.1109/DFT52944.2021.9568295

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Related publications 1

A synthetic, hierarchical approach for modelling and managing complex systems' quality and reliability = Sünteetiline, hierarhiline lähenemine keerukate süsteemide kvaliteedi ja töökindluse modelleerimiseks ja haldamiseks

116

book article EST / book article ENG

Multi-fragment Markov model guided online test generation for MPSoCVain, Jüri; Tsiopoulos, Leonidas; Kharchenko, Vyacheslav; Apneet Kaur; Jenihhin, Maksim; Raik, JaanICTERI 2017 : ICT in Education, Research and Industrial Applications. Integration, Harmonization and Knowledge Transfer : proceedings of the 13th International Conference on ICT in Education, Research and Industrial Applications. Integration, Harmonization and Knowledge Transfer, Kyiv, Ukraine, May 15-18, 20172017 / p. 594-607 : ill http://www.scopus.com/inward/record.uri?eid=2-s2.0-85020540459&partnerID=40&md5=af226e25c344c52689f23bf5c39cc267 http://ceur-ws.org/Vol-1844/10000594.pdf Conference proceedings at Scopus Article at Scopus

book article EST / book article ENG

117

book article

Multi-view modeling for MPSoC design aspects [Online resource]Vain, Jüri; Apneet Kaur; Tsiopoulos, Leonidas; Raik, Jaan; Jenihhin, MaksimBEC 2018 : 2018 16th Biennial Baltic Electronics Conference (BEC) : proceedings of the 16th Biennial Baltic Electronics Conference, October 8-10, 20182018 / 4 p.: ill https://doi.org/10.1109/BEC.2018.8600986

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118

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Mutation analysis for systemC designs at TLMGuarnieri, Valerio; Bombieri, Nicola; Pravadelli, Graziano; Fummi, Franco; Hantson, Hanno; Raik, Jaan; Jenihhin, Maksim; Ubar, Raimund-Johannes12th IEEE Latin American Test Workshop (LATW) : Porto de Galinhas, Brasil, 27-30 March 20112011 / [6] p https://ieeexplore.ieee.org/document/5985925

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119

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Mutation analysis with high-level decision diagramsHantson, Hanno; Raik, Jaan; Jenihhin, Maksim; Tšepurov, Anton; Ubar, Raimund-Johannes; Guglielmo, Giuseppe di; Fummi, FrancoLATW2010 : 11th Latin-American TestWorkshop, March 28-31, 2010, Punta del Este, Uruguay2010 / [6] p. [CD-ROM] https://ieeexplore.ieee.org/document/5550336

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120

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Nanoelectronics aging mitigation using SSBDD based techniques and dedicated sensorsUbar, Raimund-Johannes; Vargas, Fabian; Jenihhin, Maksim; Raik, JaanMEDIAN Workshop on Circuit Reliability : Modeling and Monitoring, Rome, Italy, February 25, 20132013 / [1] p

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121

book article

New categories of Safe Faults in a processor-based Embedded SystemGürsoy, Cemil Cem; Jenihhin, Maksim; Oyeniran, Adeboye Stephen; Piumatti, Davide; Raik, Jaan; Sonza Reorda, Matteo; Ubar, Raimund-Johannes2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), Cluj-Napoca, Romania : proceedings2019 / 4 p. : ill https://doi.org/10.1109/DDECS.2019.8724642

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122

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A novel fault-tolerant logic style with self-checking capabilityTaheri, Mahdi; Sheikhpour, Saeideh; Mahani, Ali; Jenihhin, MaksimProceedings - 2022 IEEE 28th International Symposium on On-Line Testing and Robust System Design, IOLTS 20222022 / art. 183305 : ill https://doi.org/10.1109/IOLTS56730.2022.9897818

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123

book article

On antagonism between side-channel security and soft-error reliability in BNN inference enginesLai, Xinhui; Lange, Thomas; Balakrishnan, Aneesh; Alexandrescu, Dan; Jenihhin, MaksimIFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC)2021 / p. 1-6 https://doi.org/10.1109/VLSI-SoC53125.2021.9606981

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Related publications 1

Approaches to extra-functional verification of security and reliability aspects in hardware designs = Riistvaraprojektide turva- ja töökindlusaspektide ekstrafunktsionaalse verifitseerimise lähenemisviisid

124

book article

On BTI aging rejuvenation in memory address decodersGürsoy, Cemil Cem; Kraak, Daniel; Ahmed, Foisal; Taouil, Mottaqiallah; Jenihhin, Maksim; Hamdioui, Said2022 IEEE 23rd Latin American Test Symposium, LATS 20222022 / Code 184360 https://doi.org/10.1109/LATS57337.2022.9936940

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125

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On NBTI-induced aging analysis in IEEE 1687 reconfigurable scan networksDamljanovic, Aleksa; Squillero, Giovanni; Gürsoy, Cemil Cem; Jenihhin, MaksimVLSI-SoC 2019 : 27th IFIP/IEEE International Conference on Very Large Scale Integration : [proceedings]2019 / p. 335-340 : ill https://doi.org/10.1109/VLSI-SoC.2019.8920313

book article

Jenihhin, Maksim (author)

types of item

author 17

CV 9

name of the person 7