Minimization of the high-level fault model for microprocessor control parts [Online resource]
author
Ubar, Raimund-Johannes
Oyeniran, Adeboye Stephen
Medaiyese, Olusiji
statement of authorship
Raimund Ubar, Adeboye Stephen Oyeniran, Olusiji Medaiyese
source
BEC 2018 : 2018 16th Biennial Baltic Electronics Conference (BEC) : proceedings of the 16th Biennial Baltic Electronics Conference, October 8-10, 2018
publisher
IEEE
year of publication
2018
pages
4 p.: ill
conference name, date
16th Biennial Baltic Electronics Conference (BEC), October 8-10, 2018
conference location
Tallinn, Estonia
url
https://doi.org/10.1109/BEC.2018.8600980
subject term
mikroprotsessorid
testimine
rikked
tarkvara
algoritmid
keyword
microprocessor testing
fault modeling
high-level decision diagrams
greedy and branch & bound algorithms
ISSN
1736-3705
ISBN
978-1-5386-7313-3
notes
Bibliogr.: 16 ref
TTÜ department
arvutisüsteemide instituut
language
inglise
Uurimisrühm
Centre for trustworthy and efficient computing hardware (TECH)
Centre of dependable computing systems