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576

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Research on digital system design and test at Tallinn University of TechnologyUbar, Raimund-Johannes; Ellervee, Peeter; Hollstein, Thomas; Jervan, Gert; Jutman, Artur; Kruus, Margus; Raik, JaanResearch in Estonia : present and future2011 / p. 184-205 : ill

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577

book article

Reseeding using compaction of pre-generated LFSR sequencesJutman, Artur; Aleksejev, Igor; Raik, Jaan; Ubar, Raimund-JohannesICECS 2008 : The 15th IEEE International Conference on Electronics, Circuits and Systems : 31st August to 3rd September 2008, Malta : conference guide2008 / p. 215

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578

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Reseeding using compaction of pre-generated LFSR sub-sequencesJutman, Artur; Aleksejev, Igor; Raik, Jaan; Ubar, Raimund-JohannesICECS 2008 : The 15th IEEE International Conference on Electronics, Circuits and Systems : Malta2008 / p. 1290-1295 : ill http://dx.doi.org/10.1109/ICECS.2008.4675096

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579

book article

Results of international cooperation for development and exchange of web-based educational materialsGramatova, Elena; Ubar, Raimund-JohannesProceedings of the III International Conference "Distance Learning - Educational Sphere of XXI Century" : Minsk, Belorussia, 20032003 / p. 17-23

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580

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RT-level test point insertion for sequential circuitsRaik, Jaan; Govind, Vineeth; Ubar, Raimund-JohannesIWoTA 2004 : IEEE 1st International Workshop on Testability Assessment : November 2, 2004, Rennes, France : proceedings2004 / p. 34-40 : ill https://ieeexplore.ieee.org/document/1428412

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581

journal article

Salajane teadus EestisUbar, Raimund-JohannesTallinna Ülikoolid1998 / 2, lk. 38-39

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582

book article

Scalable algorithm for structural fault collapsing in digital circuitsUbar, Raimund-Johannes; Jürimägi, Lembit; Orasson, Elmet; Raik, Jaan2015 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) : October 5-7, 2015, Daejeon, Korea2015 / p. 171-176 : ill

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583

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A scalable technique to identify true critical paths in sequential circuitsUbar, Raimund-Johannes; Kostin, Sergei; Jenihhin, Maksim; Raik, JaanProceedings 2017 IEEE 20th International Symposium on Design and Diagnotics of Electronic Circuit & Systems(DDECS) : April 19-21, 2017, Dresden, Germany2017 / p. 152-157 : ill https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7934553

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584

journal article

Second IEEE East-West Design and Test WorkshopHahanov, Vladimir; Ubar, Raimund-JohannesIEEE journal of design & test of computers2004 / p. 594

journal article

585

dissertation

Selected issues of modeling, verification and testing of digital systemsJutman, Artur2004 https://www.ester.ee/record=b1989760*est

dissertation

586

book

Selected papers from the 1997 NORCHIP conferenceLande, Tor Sverre; Ubar, Raimund-Johannes1999

book

587

dissertation

Self-diagnosis in digital systems = Isediagnoosivad digitaalsüsteemidKostin, Sergei2012 https://www.ester.ee/record=b2757857*est

dissertation

588

book article

Self-learning tool for digital testUbar, Raimund-Johannes; Orasson, Elmet; Evartson, TeetProceedings of 2nd International Conference "Distance Learning - Educational Sphere of the XXI Century"2002 / p. 36-38 : ill

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589

book article

Self-testing of pipe-lined signal processing architectures at-speedGorev, Maksim; Ubar, Raimund-Johannes; Ellervee, PeeterInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK seitsmenda aastakonverentsi artiklite kogumik : 15.-16. novembril 2013, Haapsalu2013 / p. 25-28 : ill

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590

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Sequential circuit test generation using decision diagram modelsRaik, Jaan; Ubar, Raimund-JohannesDesign, Automation and Test in Europe : DATE : Conference and Exhibition 1999 : Munich, Germany, March 9-12, 1999 : proceedings1999 / p. 736-740: ill

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591

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Sequential circuits BIST with status bit controlRaik, Jaan; Orasson, Elmet; Ubar, Raimund-JohannesProceedings of the 11th International Conference : Mixed Design of Integrated Circuits and Systems : MIXDES 2004 : Szczecin, Poland, 24-26 June 20042004 / p. 507-510 : ill https://pld.ttu.ee/~raiub/files/aaaaa_pulk/MIXDES/jaan.pdf

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592

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A set of tools for estimating quality of built-in self-test in digital circuitsJervan, Gert; Markus, Antti; Paomets, Priidu; Raik, Jaan; Ubar, Raimund-JohannesProceedings of the International Symposium on Signals, Circuits and Systems, Iasi (Romania), October 2-3, 19971997 / p. 362-365

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593

book article

7-valued algebra for transition delay fault analysisKõusaar, Jaak; Ubar, Raimund-JohannesBEC 2014 : 2014 14th Biennial Baltic Electronics Conference : proceedings of the 14th Biennial Baltic Electronics Conference : Tallinn University of Technology, October 6-8, 2014, Tallinn, Estonia2014 / p. 89-92 : ill

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594

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Shared Structurally Synthesized BDDs for speeding-up parallel pattern simulation in digital circuitsUbar, Raimund-Johannes; Jürimägi, Lembit; Raik, Jaan2015 Nordic Circuits and Systems Conference (NORCAS) : NORCHIP & International Symposium on System-on-Chip (SoC) : 1st IEEE NORCAS Conference : 26-28 October 2015, Oslo, Norway2015 / [4] p. : ill http://dx.doi.org/10.1109/NORCHIP.2015.7364406

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595

book article

Simulating system for minicomputer diagnostic programsKitsnik, Peeter; Ubar, Raimund-Johannes; Viilup, AguPreprints 1st IFAC/IFIP Symposium on Software for Computer Control, SOCOCO-76 : Tallinn, USSR, May 25-28, 19761976 / lk. [?] https://www.ester.ee/record=b1291026*est http://www.digar.ee/id/nlib-digar:451346

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596

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Simulation of digital systems with high-level decision diagramsMorawiec, Adam; Raik, Jaan; Ubar, Raimund-JohannesThe 7th Biennial Conference on Electronics and Microsystem Technology "Baltic Electronics Conference" : BEC 2000 : October 8 - 11, 2000, Tallinn, Estonia : conference proceedings2000 / p. 35-38 : ill

book article

597

dissertation

Simulation-based hardware verification with high-level decision diagrams = Simuleerimisel põhinev riistvara verifitseerimine kõrgtaseme otsustusdiagrammidelJenihhin, Maksim2008 https://www.ester.ee/record=b2431332*est

dissertation

598

book article

Simulation-based verification with APRICOT framework using high-level decision diagramsJenihhin, Maksim; Raik, Jaan; Tšepurov, Anton; Ubar, Raimund-JohannesEast-West Design & Test Symposium : Moscow, September 18-21, 20092009 / p. 13-16 : ill

book article

599

journal article

Single gate design error diagnosis in combinational circuitsUbar, Raimund-Johannes; Borrione, DominiqueProceedings of the Estonian Academy of Sciences. Engineering1999 / 1, p. 3-21: ill https://artiklid.elnet.ee/record=b1000315*est

journal article

600

book article

SoC and board modeling for processor-centric board testingTšertov, Anton; Ubar, Raimund-Johannes; Jutman, Artur; Devadze, Sergei14th Euromicro Conference on Digital System Design : Architectures, Methods and Tools : DSD 2011 : 31 August - 2 September 2011, Oulu, Finland : proceedings2011 / p. 575-582 : ill https://ieeexplore.ieee.org/document/6037463

book article

Ubar, Raimund-Johannes (author)

types of item

CV 61

author 57

name of the person 28

subject term 1