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1
journal article
Acceleration of recursive data sorting over tree-based structures
Mihhailov, Dmitri
;
Sudnitsõn, Aleksander
;
Sklyarov, Valery
;
Skliarova, Iouliia
Elektronika ir elektrotechnika = Electronics and electrical engineering
2011
/
p. 51-56 : ill
https://eejournal.ktu.lt/index.php/elt/article/view/612
journal article
2
journal article
Algorithms of functional level testability analysis for digital circuits
Ubar, Raimund-Johannes
;
Kuchcinski, Ktzysztof
Periodica polytechnica. Electrical engineering
1992
/
3/4, p. 295-308
journal article
3
book article
Approaches to improve hierarchical ATPG for synchronous sequential circuits
Viilukas, Taavi
Info- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kuuenda aastakonverentsi artiklite kogumik : 3.-5. oktoobril 2012, Laulasmaa
2012
/
p. 105-108 : ill
book article
4
book article
Automated test pattern generator with constraint solver
Viilukas, Taavi
;
Raik, Jaan
Info- ja kommunikatsioonitehnoloogia doktorikooli IKTDK neljanda aastakonverentsi artiklite kogumik : 26.-27. novembril 2010, Essu mõis
2010
/
lk. 33-36
book article
5
book article
Automatic synthesis of asynchronous circuits from synchronous RTL descriptions
Öberg, Johnny
;
Plosila, Juha
;
Ellervee, Peeter
Proceedings 23rd NORCHIP Conference : Oulu, Finland, 21-22 November 2005
2005
/
p. 200-205 : ill
https://ieeexplore.ieee.org/document/1597024/keywords#keywords
book article
6
book article
Back-traced deductive-parallel fault simulation for digital systems
Hahanov, Vladimir
;
Ubar, Raimund-Johannes
;
Hyduke, Stanley
Proceedings : Euromicro Symposium on Digital System Design : Belek-Antalya, Turkey, September 1st to 6th, 2003
2003
/
p. 370-377 : ill
https://ieeexplore.ieee.org/document/1231969
book article
7
book article
Boolean fault dignosis with structurally synthesized BDDs
Ubar, Raimund-Johannes
Recent progress in the Boolean domain
2014
/
p. 303-331 : ill
book article
8
book article
Collaborative distributed computing in the field of digital electronics testing
Ivask, Eero
;
Devadze, Sergei
;
Ubar, Raimund-Johannes
Balanced Automation Systems for Future Manufacturing Networks : 9th IFIP WG 5.5 International Conference : BASYS 2010 : Valencia, Spain, July 21-23, 2010 : proceedings
2010
/
p. 145-152
book article
9
book article
Collaborative distributed fault simulation for digital electronic circuits
Ivask, Eero
;
Devadze, Sergei
;
Ubar, Raimund-Johannes
Intelligent Distributed Computing IV : proceedings of the 4th International Symposium on Intelligent Distributed Computing - IDC 2010 : Tangier, Morocco, September 2010
2010
/
p. 67-76
book article
10
book article
Constraint-based hierarchical untestability identification for synchronous sequential circuits
Raik, Jaan
;
Rannaste, Anna
;
Jenihhin, Maksim
;
Viilukas, Taavi
;
Ubar, Raimund-Johannes
;
Fujiwara, Hideo
Sixteenth IEEE European Test Symposium : 23-27 May 2011, Trondheim
2011
/
p. 147-152
book article
11
book article
Constraint-based hierarchical untestability identification for syncronous sequential circuits
Viilukas, Taavi
;
Raik, Jaan
;
Ubar, Raimund-Johannes
;
Rannaste, Anna
;
Jenihhin, Maksim
;
Fujiwara, Hideo
Info- ja kommunikatsioonitehnoloogia doktorikooli IKTDK viienda aastakonverentsi artiklite kogumik : 25.-26. novembril 2011, Nelijärve
2011
/
p. 139-142 : ill
book article
12
dissertation
Constraints solving based hierarchical test generation for synchronous sequential circuits = Kitsenduste lahendamisel baseeruv hierarhiline testigenereerimine sünkroonsetele järjestikskeemidele
Viilukas, Taavi
2012
https://www.ester.ee/record=b2888278*est
dissertation
13
book article
Decision diagrams for diagnostic modeling
Ubar, Raimund-Johannes
MEDIAN Finale : Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale : November 10-11, 2015, Tallinn, Estonia
2015
/
p. 43
book article
14
book article
Defect-oriented modul-level fault diagnosis in digital circuits
Kostin, Sergei
;
Ubar, Raimund-Johannes
;
Raik, Jaan
Proceedings of the 2011 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems : April 13-15, 2011, Gottbus, Germany
2011
/
p. 81-86
book article
15
book article
Defect-oriented test- and layout-generation for standard-cell ASIC designs
Sudbrock, Joachim
;
Raik, Jaan
;
Ubar, Raimund-Johannes
;
Kuzmicz, Wieslaw
;
Pleskacz, Witold A.
Proceedings : DSD'2005 : 8th Euromicro Conference on Digital System Design : Architectures, Methods and Tools : Porto, Portugal, August 30 - September 3, 2005
2005
/
p. 79-82 : ill
https://ieeexplore.ieee.org/document/1559781
book article
16
book article
Description of digital objects with alternative graphs for test generation purposes
Ubar, Raimund-Johannes
;
Lohuaru, Tõnu
Fault Tolerant Systems and Diagnostics : XI. International Conference ; Proceedings ; Suhl, June 6-9, 1988
1988
/
p. [?]
book article
17
book
Design and test technology for dependable systems-on-chip
2011
https://www.ester.ee/record=b4467408*est
book
18
book article
Design error diagnosis using backtrace algorithm on decision diagrams
Repinski, Urmas
;
Raik, Jaan
;
Ubar, Raimund-Johannes
;
Jenihhin, Maksim
;
Tšepurov, Anton
Info- ja kommunikatsioonitehnoloogia doktorikooli IKTDK neljanda aastakonverentsi artiklite kogumik : 26.-27. novembril 2010, Essu mõis
2010
/
p. 93-96
book article
19
book article
Design obfuscation versus test
Farahmandi, Farimah
;
Sinanoglu, Ozgur
;
Blanton, Ronald
;
Pagliarini, Samuel Nascimento
2020 IEEE European Test Symposium (ETS) : ETS 2020, May 25 - 29, 2020, Tallinn, Estonia
2020
/
10 p
https://doi.org/10.1109/ETS48528.2020.9131590
book article
20
book
Design of FPGA-based circuits using hierarchical finite state machines
Skliarova, Iouliia
;
Sklyarov, Valery
;
Sudnitsõn, Aleksander
2012
http://www.ester.ee/record=b2857138*est
book
21
dissertation
DfT-based external test and diagnosis of mesh-like networks on chips = Testitavusel põhinev välise testi ja diagnoosi meetod kahemõõtmelistele kiipvõrkudele
Govind, Vineeth
2009
https://digi.lib.ttu.ee/i/?454
https://www.ester.ee/record=b2539211*est
dissertation
22
dissertation
Digital test in WEB-based environment
Ivask, Eero
2006
https://www.ester.ee/record=b2158119*est
dissertation
23
journal article
Dynamic analysis of digital circuits with multi-valued simulation
Ubar, Raimund-Johannes
Microelectronics journal
1998
/
11, p. 821-826: ill
journal article
24
book article
Evalutionary two-criteria optimization of finite state machines
Spitšakova, Margarita
Info- ja kommunikatsioonitehnoloogia doktorikooli IKTDK neljanda aastakonverentsi artiklite kogumik : 26.-27. novembril 2010, Essu mõis
2010
/
lk. 101-104
book article
25
book article
Evolutionary approach to the functional test generation for digital circuits
Skobtsov, Y.A.
;
Ivanov, D.E.
;
Skobtsov, V.Y.
;
Ubar, Raimund-Johannes
BEC 2004 : proceedings of the 9th Biennial Baltic Electronics Conference : October 3-6, 2004, Tallinn, Estonia
2004
/
p. 229-232 : ill
book article
Number of records 84, displaying
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