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Assembling low-level tests to high-level symbolic test frames (title)
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book article
Assembling low-level tests to high-level symbolic test frames
Jervan, Gert
;
Markus, Antti
;
Raik, Jaan
;
Ubar, Raimund-Johannes
Proceedings [of the] 15th NORCHIP Conference, Tallinn, 10-11 November 1997
1997
/
p. 275-280: ill
book article
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26
1.
logic level and high level BDDs
2.
high-level synthesis for test
3.
high-level test data generation
4.
low-level control system transportation
5.
low-level fault redundancy
6.
low-level radiation
7.
Low-level RF EMF
8.
behaviour level test generation
9.
Hierarchical Multi-level Test Generation
10.
system level test
11.
high level DD (HLDD)
12.
high level of security
13.
high level synthesis
14.
high-level control fault model
15.
high-level control faults
16.
high-level decision diagram
17.
high-level decision diagrams
18.
high-level decision diagrams (HLDD) synthesis
19.
High-level Decision Diagrams for Modeling Digital Systems
20.
high-level expert group on AI
21.
high-level fault coverage
22.
high-level fault model
23.
high-level fault simulation
24.
high-level functional fault model
25.
high-level synthesis
26.
High-Level Synthesis (HLS)
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