Toggle navigation
Publications
Profiles
Research Groups
Indexes
Help and information
Eesti keeles
Intranet
Publications
Profiles
Research Groups
Indexes
Help and information
Eesti keeles
Intranet
Databases
Publications
Searching
My bookmarks
0
high-level test data generation (keyword)
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
All fields
Source search
Author search
Subject term search
Title search
starts with
containes
exact match
—
Add criteria
Advanced search
filter
Clear
×
types of item
book
..
journal article
..
newspaper article
..
book article
..
dissertation
..
Open Access
..
Scientific publication
..
year
year of publication
Loading..
author
Loading..
TTÜ department
Loading..
subject term
Loading..
series
Loading..
name of the person
Loading..
keyword
Loading..
Clear
Number of records
2
Look more..
(1/36)
Export
export all inquiry results
(2)
Save TXT fail
Save PDF fail
print
Open for editing with marked entries
my bookmarks
display
Bibliographic view
Short view
sort
author ascending
author descending
year of publication ascending
year of publication descending
title ascending
title descending
1
book article
High-Level Combined Deterministic and Pseudo-exhuastive Test Generation for RISC Processors
Oyeniran, Adeboye Stephen
;
Ubar, Raimund-Johannes
;
Jenihhin, Maksim
;
Raik, Jaan
2019 IEEE European Test Symposium (ETS) : ETS 2019, May 27-31, 2019, Baden-Baden, Germany : Proceedings
2019
/
6 p. : ill
https://doi.org/10.1109/ETS.2019.8791526
book article
2
book article
High-level functional test generation for microprocessor modules
Oyeniran, Adeboye Stephen
;
Ubar, Raimund-Johannes
Proceedings of 26th International Conference Mixed Design of Integrated Circuits and Systems : MIXDES 2019 : Rzeszów, Poland, June 27 - 29, 2019
2019
/
p. 356-361 : ill
https://doi.org/10.23919/MIXDES.2019.8787131
book article
Number of records 2, displaying
1 - 2
keyword
36
1.
high-level test data generation
2.
behaviour level test generation
3.
high-level synthesis for test
4.
logic level and high level BDDs
5.
extreme penetration level of non synchronous generation
6.
adaptive test strategy generation
7.
automated test pattern generation
8.
automatic test case generation
9.
automatic test pattern generation
10.
automatic test program generation
11.
functional test generation
12.
highlevel test generation
13.
implementation-independent test generation
14.
offline test generation
15.
provably correct test generation
16.
test generation
17.
test generation and fault diagnosis
18.
test program generation
19.
system level test
20.
high level DD (HLDD)
21.
high level synthesis
22.
high-level control fault model
23.
high-level control faults
24.
high-level decision diagram
25.
high-level decision diagrams
26.
high-level decision diagrams (HLDD) synthesis
27.
high-level expert group on AI
28.
high-level fault coverage
29.
high-level fault model
30.
high-level fault simulation
31.
high-level functional fault model
32.
High-Level Synthesis (HLS)
33.
high-speed serial link test
34.
high-dimensional data
35.
high-frequency data
36.
High-Pressure High-Temperature Spark Plasma Sintering
×
vaste
starts with
ends with
containes
sort
Relevance
ascending
descending
year of publication
author
TTÜ department
subject term
series
name of the person
keyword
Otsing
Valikud
0
year of publication
AND
OR
NOT
author
AND
OR
NOT
TTÜ department
AND
OR
NOT
subject term
AND
OR
NOT
series
AND
OR
NOT
name of the person
AND
OR
NOT
keyword
AND
OR
NOT