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A scalable technique to identify true critical paths in sequential circuitsUbar, Raimund-Johannes; Kostin, Sergei; Jenihhin, Maksim; Raik, JaanProceedings 2017 IEEE 20th International Symposium on Design and Diagnotics of Electronic Circuit & Systems(DDECS) : April 19-21, 2017, Dresden, Germany2017 / p. 152-157 : ill https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7934553

artikkel kogumikus
2

artikkel kogumikus

A tool set for teaching design-for-testability of digital circuitsKostin, Sergei; Orasson, Elmet; Ubar, Raimund-JohannesEWME 2016 : 11th European Workshop on Microelectronics Education : May 11-13, 2016, Southampton, UK2016 / [6] p. : ill http://dx.doi.org/10.1109/EWME.2016.7496466

artikkel kogumikus
3

raamat

Boole'i algebra kasutamine automaatikalülituste projekteerimisel : loengukonspektAgur, Ustus1972 https://www.ester.ee/record=b1327567*est

raamat
4

artikkel ajakirjas

Calculation of probabilistic testability measures for digital circuits with Structurally Synthesized BDDsJürimägi, Lembit; Ubar, Raimund-Johannes; Jenihhin, Maksim; Raik, JaanMicroprocessors and microsystems2020 / art. 103117, 12 p https://doi.org/10.1016/j.micpro.2020.103117

artikkel ajakirjas
5

artikkel kogumikus

Combinational fault simulation in sequential circuitsUbar, Raimund-Johannes; Kõusaar, Jaak; Gorev, Maksim; Devadze, Sergei2015 IEEE International Symposium on Circuits and Systems : 24-27 May 2015, Lisboa, Portugal : [proceedings]2015 / p. 2876-2879 : ill

artikkel kogumikus
6

artikkel kogumikus

Complex delay fault reasoning with sequential 7-valued algebraKõusaar, Jaak; Ubar, Raimund-Johannes; Aleksejev, Igor2015 16th Latin American Test Symposium (LATS 2015) : Puerto Vallarta, Mexico, 25-27 March 20152015 / [6] p. : ill http://dx.doi.org/10.1109/LATW.2015.7102403

artikkel kogumikus
7

raamat

Computational aspects of nodal method for simulation of electronic circuitsLaksberg, Edgar1983

raamat
8

artikkel ajakirjas

Computer-aided examination of the I²L current source and the behaviour of the I²L flip-flop used in static memory cellsRang, ToomasPeriodica polytechnica. Electrical engineering = Электротехника1981 / p. 159-165 : joon https://www.ester.ee/record=b1198855*est https://pp.bme.hu/ee/article/view/4776/3881

artikkel ajakirjas
9

artikkel kogumikus

Conditional fault collapsing in digital circuits with shared structurally synthesized BDDs [Online resource]Jürimägi, Lembit; Ubar, Raimund-JohannesBEC 2018 : 2018 16th Biennial Baltic Electronics Conference (BEC) : proceedings of the 16th Biennial Baltic Electronics Conference, October 8-10, 20182018 / 4 p. : ill https://doi.org/10.1109/BEC.2018.8600967

artikkel kogumikus
10

artikkel kogumikus

Critical path tracing based simulation of transition delay faultsKõusaar, Jaak; Ubar, Raimund-Johannes; Devadze, Sergei; Raik, Jaan2014 17th Euromicro Conference on Digital System Design : DSD 2014 : 27-29 August 2014, Verona, Italy : proceedings2014 / p. 108-113 : ill

artikkel kogumikus
11

artikkel kogumikus

Critical path tracing based simulation of transition delay faultsKõusaar, Jaak; Ubar, Raimund-Johannes; Devadze, Sergei; Raik, JaanProceedings of the 8th Annual Conference of the Estonian National Doctoral School in Information and Communication Technologies : December 5-6, 2014, Rakvere2014 / p. 61-66 : ill

artikkel kogumikus
12

artikkel ajakirjas

Design error diagnosis in digital circuits with stuck-at fault modelJutman, Artur; Ubar, Raimund-JohannesMicroelectronics reliability2000 / 2, p. 307-320 : ill

artikkel ajakirjas
13

raamat

Digitaalsüsteemide diagnostikaUbar, Raimund-Johannes2005 http://www.ester.ee/record=b2097071*est

raamat
14

artikkel kogumikus

Ein universeller Weg zur Automatisierung des Testentwurfs für digitale ObjecteUbar, Raimund-Johannes; Lohuaru, TõnuFehler in Automaten1989 / S. 16-30 : Ill

artikkel kogumikus
15

raamat

Electronic circuits : examples for project based subject "Technologies of electronic products"Sillakivi, Peeter; Tamm, Uljas2003 https://www.ester.ee/record=b1828290*est

raamat
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Elektronlülitused : näidisskeemid projektipõhilisele õppeainele "Elektrontoodete tehnoloogiad"2003 https://www.ester.ee/record=b1828299*est

raamat
17

raamat

European Test Symposium : ETS 2005 : 22-25 May 2005, Tallinn, Estonia : proceedingsCantarella, JD2005 https://www.ester.ee/record=b2300865*est

raamat
18

artikkel ajakirjas

Exact parallel critical path fault tracing to speed-up fault simulation in sequential circuitsKõusaar, Jaak; Ubar, Raimund-Johannes; Kostin, Sergei; Devadze, Sergei; Raik, JaanInternational journal of microelectronics and computer science2018 / p. 9−18 https://ijmcs.dmcs.pl/web/guest/vol.-9-no.-1 https://ijmcs.dmcs.pl/documents/10630/345460/IJMCS_1_2018_2.pdf

artikkel ajakirjas
19

artikkel ajakirjas

Fast identification of true critical paths in sequential circuitsUbar, Raimund-Johannes; Kostin, Sergei; Jenihhin, Maksim; Raik, Jaan; Jürimägi, LembitMicroelectronics reliability2018 / p. 252-261 : ill https://doi.org/10.1016/j.microrel.2017.11.027

artikkel ajakirjas
20

artikkel kogumikus

Fault simulation with parallel exact critical path tracing in multiple core environmentGorev, Maksim; Ubar, Raimund-Johannes; Devadze, SergeiProceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE) : 9-13 March 2015, Grenoble, France2015 / p. 1180-1185 : ill

artikkel kogumikus
21

raamat

Handbook of testing electronic systemsNovak, Ondrej; Gramatova, Elena; Ubar, Raimund-Johannes; Jutman, Artur; Raik, Jaan2005 https://www.ester.ee/record=b2102523*est

raamat
22

artikkel kogumikus

Hierarchical identification of NBTI-critical gates in nanoscale logicKostin, Sergei; Raik, Jaan; Ubar, Raimund-Johannes; Jenihhin, MaksimLATW2014 : 15th IEEE Latin-American Test Workshop : Fortaleza, Brazil, March 12th-15th, 20142014 / [6] p. : ill

artikkel kogumikus
23

artikkel kogumikus

Hierarchical identification of untestable faults in sequential circuitsRaik, Jaan; Ubar, Raimund-Johannes; Krivenko, Anna; Kruus, Margus10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007 : 29-31 August 2007, Lübeck, Germany : proceedings2007 / p. 668-671 : ill http://dx.doi.org/10.1109/DSD.2007.4341539

artikkel kogumikus
24

artikkel ajakirjas

Identification and rejuvenation of NBTI-critical logic paths in nanoscale circuitsJenihhin, Maksim; Squillero, Giovanni; Tihhomirov, Valentin; Kostin, Sergei; Raik, Jaan; Ubar, Raimund-JohannesJournal of electronic testing : theory and applications (JETTA)2016 / p. 273-289 : ill http://dx.doi.org/10.1007/s10836-016-5589-x

artikkel ajakirjas
25

artikkel kogumikus

Identification and rejuvenation of NBTI-critical paths in nanoscale logic circuitsJenihhin, Maksim1st International Workshop on Reliability and Aging in Forthcoming Electronic Systems : May 28-29, 2015, Cluj-Napoca, Romania2015 / [1] p

artikkel kogumikus

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