Searching - TalTech Research Portal

display

sort

76

book article

FPGA based fault emulation of synchronous sequential circuitsEllervee, Peeter; Raik, Jaan; Tihhomirov, Valentin; Ubar, Raimund-JohannesProceedings [of] 22nd NORCHIP Conference : Oslo, Norway, 8-9 November 20042004 / p. 59-62 https://ieeexplore.ieee.org/abstract/document/1423822

book article

77

book article

Functional level test set generation methodsUbar, Raimund-JohannesProceedings of the 12th Conference on Fault-Tolerant Systems and Diagnostics, Prague, Czechoslovakia, September, 19891989 / p. 46-55

book article

78

journal article EST / journal article ENG

Functional self-test of high-performance pipe-lined signal processing architecturesGorev, Maksim; Ubar, Raimund-Johannes; Ellervee, Peeter; Devadze, Sergei; Raik, Jaan; Min, MartMicroprocessors and microsystems2015 / p. 909-918 : ill https://doi.org/10.1016/j.micpro.2014.11.002 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

79

book article

Functional specification and testing of digital systemsUbar, Raimund-JohannesMultimicroprocessor systems: Proceedings of the 3rd Symposium, Stralsund, oct. 16-20, 1989, Vol 11989 / p. 207-217

book article

80

book article

Functional test program generation for digital systemsUbar, Raimund-Johannes; Dušina, Julia; Krupnova, Helena; Storožev, Sergei; Zaugarov, ViktorTestmethoden und Zuverlässigkeit von Schaltungen und Systemen : proceedings of the 6th workshop, Vaals (Niederlande), March 6-8, 19941994 / p. 14-18: ill

book article

81

book article

GA-based test generation for sequential circuitsBrik, Marina; Raik, Jaan; Ubar, Raimund-Johannes; Ivask, EeroProceedings of East–West Design & Test Workshop (EWDTW’04) : Yalta, Alushta, Crimea, Ukraine, September 23-26, 20042004 / p. 30-34

book article

82

book article

A general approach to synthesis of the finite-state machine logical structure in the sum-of-products formChapenko, V.; Fritsnovich, G.; Kalnberzin, A.; Lange, E.BEC : Baltic Electronics Conference : proceedings of the 4th Biennial Conference, October 9-14, 1994, Tallinn (Estonia). 21994 / p. 385-390 https://www.ester.ee/record=b2150914*est

book article

83

book article

Genetic algorithm approach to the problem of finite state machine constructionSpitšakova, MargaritaInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 69-72 : ill

book article

84

book

Guide to the digital switchoverNyman-Metcalf, Katrin Merike; Richter, Andrei2010 https://www.osce.org/files/f/documents/8/c/73720.pdf

book

85

book article

Hierarchical approach to test generation for digital systems at system, circuit and defect levelsUbar, Raimund-Johannes45. Internationales Wissenschaftliches Kolloquium, 04.-06.10.2000 : Tagungsband2000 / S. 711-716 : Ill

book article

86

book article

Hierarchical design error diagnosis in combinational circuits by stuck-at fault test patternsUbar, Raimund-Johannes; Jutman, ArturProceedings of the 6th International Conference on Mixed Design of Integrated Circuits and Systems : MIXDES'99 : Krakow, Poland, 17-19 June 19991999 / p. 437-442 : ill https://www.sciencedirect.com/science/article/pii/S0026271499002036

book article

87

book article

Hierarchical fault diagnosis in embedded digital systems with multi-level decision diagrams [Electronic resource]Ubar, Raimund-Johannes; Evartson, Teet; Lensen, Harri; Aarna, Margit5th International Conference on Industrial Automation = Cinquieme Conference Internationale sur l'Automatisation Industrielle : June 11-13, 2007, Montreal, Canada2007 / [6] p. [CD-ROM]

book article

88

book article

Hierarchical fault simulation in digital systemsUbar, Raimund-Johannes; Raik, Jaan; Ivask, Eero; Brik, MarinaInternational Symposium on Signals, Circuits and Systems : SCS 2001 : July 10-11, 2001, Iasi, Romania : proceedings2001 / p. 181-184 : ill

book article

89

book article

Hierarchical test generation for complex digital systems with control and data processing partsUbar, Raimund-Johannes; Raik, Jaan"Test, Assembly and Packaging" : SEMICON Technical Symposium : Singapur, May 3-6, 19991999 / p. 43-52

book article

90

book article

Hierarchical test generation for digital systemsBrik, Marina; Jervan, Gert; Markus, Antti; Raik, Jaan; Ubar, Raimund-JohannesMixed design of integrated circuits and systems1998 / p. 131-136: ill https://link.springer.com/chapter/10.1007/978-1-4615-5651-0_20

book article

91

book article

Hierarchical test generation for digital systems based on combining bottom-up and top-down approachesRaik, Jaan; Ubar, Raimund-JohannesWorld Multiconference on Systemics, Cybernetics and Informatics, July 12-16, 1998, Orlando, Florida : proceedings. Vol. 11998 / p. 374-381: ill

book article

92

book article

Hierarchical test generation with multi-level decision diagram modelsJervan, Gert; Markus, Antti; Raik, Jaan; Ubar, Raimund-JohannesProceedings of the 7th IEEE North Atlantic Test Workshop, West Greenwich RI, USA, May 28-29, 19981998 / p. 26-33 https://www.academia.edu/67811738/Hierarchical_Test_Generation_with_Multi_Level_Decision_Diagram_Models?hb-g-sw=7883185

book article

93

book article

Hierarchical test generation. SEMI show slidesUbar, Raimund-Johannes; Raik, Jaan"Test, Assembly and Packaging" : SEMICON Technical Symposium : Singapur, May 3-6, 19991999 / p. 53-64

book article

94

book article

Hierarchical test synthesis for digital systems using alternative graph modelUbar, Raimund-JohannesQuantitative aspects of designing and validating dependable computing systems1995

book article

95

book article

High level fault modeling in digital systemsUbar, Raimund-Johannes; Aarna, Margit; Brik, Marina; Raik, JaanSynergies between Information and Automation : 49. Internationales Wissenschaftliches Kolloquium, 27.-30.9.2004, Technische Universität Ilmenau, Germany. Volume 22004 / p. 486-491

book article

96

journal article

High quality test generation for digital systemsUbar, Raimund-Johannes; Aarna, Margit; Kruus, Helena; Raik, JaanRomanian journal of information science and technology2005 / 1, p. 73-84 : ill

journal article

97

book article

High-Level Decision Diagram manipulations for code coverage analysisMinakova, Karina; Reinsalu, Uljana; Tšepurov, Anton; Raik, Jaan; Jenihhin, Maksim; Ubar, Raimund-Johannes; Ellervee, PeeterBEC 2008 : 2008 International Biennial Baltic Electronics Conference : proceedings of the 11th Biennial Baltic Electronics Conference : Tallinn University of Technology : October 6-8, 2008, Tallinn, Estonia2008 / p. 207-210 : ill

book article

98

book article

High-level synthesis and test in the MOSCITO-based virtual laboratorySchneider, Andre; Diener, Karl-Heinz; Jervan, Gert; Peng, Z.; Raik, Jaan; Ubar, Raimund-Johannes; Hollstein, Thomas; Glesner, M.BEC 2002 : proceedings of the 8th Biennial Baltic Electronics Conference : October 6-9, 2002, Tallinn, Estonia2002 / p. 287-290 : ill

book article

99

book article

How to generate high quality tests for digital systemsUbar, Raimund-Johannes; Aarna, Margit; Kruus, Helena; Raik, Jaan2004 International Semiconductor Conference : 27th edition, October 4-6, 2004, Sinaia, Romania : CAS 2004 proceedings. Volume 22004 / p. 459-462 : ill http://dx.doi.org/10.1109/SMICND.2004.1403048

book article

100

book article

Hybrid BIST optimization for core-based systems with test pattern broadcastingUbar, Raimund-Johannes; Jenihhin, Maksim; Jervan, Gert; Peng, ZeboDELTA 2004 : second IEEE International Workshop on Electronic Design, Test and Applications : 28-30 January 2004, Perth, Australia : proceedings2004 / p. 3-8 : ill https://ieeexplore.ieee.org/document/1409808

book article

digitaaltehnika (subject term)

types of item

subject term 1