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101
book article
Kiibiargonaudid, nende kuldvillak ja sümplegaadid
Tammemäe, Kalle
;
Ellervee, Peeter
Informaatika perspektiivsed suunad : Eesti Teaduste Akadeemia seminari materjalid : 29.11.2000
2000
/
lk. 17-20 : ill
book article
102
newspaper article
Kiibikriis: kas maailmalõpp või Eesti võimalus?
Raik, Jaan
Postimees
2022
/
Lk. 12
https://dea.digar.ee/article/postimees/2021/12/14/12.4
newspaper article
103
newspaper article
Kolm TalTechi teadlast siirduvad Stanfordi ülikooli uurimistööd tegema [Võrguväljaanne]
postimees.ee
2022
"Kolm TalTechi teadlast siirduvad Stanfordi ülikooli uurimistööd tegema "
newspaper article
104
journal article
Kuidas mõjutab kiipsüsteem elektroonika-alast kõrgharidust?
Ellervee, Peeter
A & A
2002
/
1, lk. 50-52
journal article
105
journal article
Kuidas saada kiipsüsteemi disaineriks
Tammemäe, Kalle
A & A
2001
/
1, lk. 19-21
journal article
106
journal article
Kuidas suhtlevad kiibid e I2C ja SPI liidesed
Tammemäe, Kalle
Arvutustehnika ja Andmetöötlus
1994
/
6, lk. 2-5 ; 7/8, lk. 2-4 ; 9, lk. 2-5 : ill
journal article
107
journal article
Kuidas testida arvutivõrku ränikiibil
Raik, Jaan
;
Govind, Vineeth
A & A
2010
/
4, lk. 35-37
https://artiklid.elnet.ee/record=b2286479*est
journal article
108
book article
Latch-Based logic locking
Sweeney, J.
;
Mohammed Zackriya, V.
;
Pagliarini, Samuel Nascimento
;
Pileggi, Larry
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2020
2020
/
p. 132−141 : ill
https://doi.org/10.1109/HOST45689.2020.9300256
book article
109
book article
Layout to logic defect analysis for hierarchical test generation
Jenihhin, Maksim
;
Raik, Jaan
;
Ubar, Raimund-Johannes
;
Pleskacz, Witold A.
;
Rakowski, Michal
Proceedings of the 2007 IEEE Workshop on Design and Diagnostic Circuits and Systems : April 11-13, 2007, Krakow, Poland
2007
/
p. 35-40 : ill
http://dx.doi.org/10.1109/DDECS.2007.4295251
book article
110
book article EST
/
book article ENG
Lightweight monitoring scheme for flooding DoS Attack detection in multi-tenant MPSoCs
Chaves Arroyave, Cesar Giovanni
;
Sepulveda, Johanna
;
Hollstein, Thomas
2021 IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea May 22-28, 2021 : proceedings
2021
/
5 p
https://doi.org/10.1109/ISCAS51556.2021.9401153
Conference Proceedings at Scopus
Article at Scopus
Article at WOS
book article EST
/
book article ENG
Seotud publikatsioonid
1
Bandwidth Reduction DoS attacks in Multi-Tenant NoC-based MPSoCs : detection and avoidance strategies = Ribalaiuse vähendamise DoS-rünnakud mitme rentnikuga NoC-põhiste MPSoC-de puhul : tuvastamise ja vältimise strateegiad
111
journal article
Logic IP for low-cost IC design in advanced CMOS nodes
Isgenc, Mehmet Meric
;
Martins, Mayler G.A.
;
Zackriya, V. Mohammed
;
Pagliarini, Samuel Nascimento
;
Pileggi, Larry
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
2020
/
p. 585-595
https://doi.org//10.1109/TVLSI.2019.2942825
journal article
112
book article
Logic simulation and fault collapsing with shared structurally synthesized BDDs
Mironov, Dmitri
;
Ubar, Raimund-Johannes
;
Raik, Jaan
2014 19th IEEE European Test Symposium (ETS) : May 26th-30th, 2014, Paderborn, Germany : proceedings
2014
/
[2] p. : ill
book article
113
dissertation
Low power finite state machine synthesis
Fomina, Jelena
2005
https://www.ester.ee/record=b2097121*est
dissertation
114
book article
Low power synthesis based on information theoretic measures
Fomina, Jelena
;
Keevallik, Andres
;
Sudnitsõn, Aleksander
23rd International Conference on Microelectronics : MIEL 2002, Niš, Yugoslavia, 12-15 May 2002 : proceedings
2002
/
p. 699-702
https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=1003354
book article
115
book article
Low-area boundary BIST architecture for mesh-like network-on-chip
Raik, Jaan
;
Govind, Vineeth
Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 18-20, 2012 Tallinn, Estonia
2012
/
p. 95-100 : ill
book article
116
book article
Lower bounds of the size of shared structurally synthesized BDDs
Ubar, Raimund-Johannes
;
Mironov, Dmitri
Proceedings of the 2014 IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 23-25, 2014, Warsaw, Poland
2014
/
p. 77-82 : ill
book article
117
journal article
Madalapingelised integraallülitused
Toomsalu, Arvo
Arvutustehnika ja Andmetöötlus
1996
/
4, lk. 7-10; 5, lk. 9-14; 6, lk. 6-9: ill
journal article
118
newspaper article
Majandusele oluline kiibikeskus võib 1 miljoni pärast käest libiseda: MKM kahtleb, EISA on poolt
Puusild, Harro
aripaev.ee
2024
Majandusele oluline kiibikeskus võib 1 miljoni pärast käest libiseda: MKM kahtleb, EISA on poolt
newspaper article
119
book article
A method for crosstalk fault detection in on-chip buses
Bengtsson, Tomas
;
Jutman, Artur
;
Ubar, Raimund-Johannes
;
Kumar, Shashi
Norchip : proceedings : Oulu, Finland, 21-22 November 2005
2005
/
p. 285-288 : ill
https://doi.org/10.1109/NORCHP.2005.1597045
book article
120
dissertation
Methode et outil de prototypage des systemes integres sur FPGAs : [doktoriväitekiri]
Krupnova, Helena
1999
dissertation
121
dissertation
Methods to optimize functional safety assessment for automotive integrated circuits = Meetodid autotööstuse kiipide funktsionaalse ohutuse hindamise optimeerimiseks
Bagbaba, Ahmet Cagri
2022
https://doi.org/10.23658/taltech.9/2022
https://digikogu.taltech.ee/et/Item/58b0b89d-b1ba-4a73-ba53-850910d697b5
https://www.ester.ee/record=b5491885*est
dissertation
Seotud publikatsioonid
10
Accelerating transient fault injection campaigns by using Dynamic HDL Slicing
Efficient fault injection based on dynamic HDL slicing technique
Special session : AutoSoC - a suite of open-source automotive SoC benchmarks
Representing gate-level SET faults by multiple SEU faults on RT-level
Improving the confidence level in functional safety simulation tools for ISO 26262
Use of formal methods for verification and optimization of fault lists in the scope of ISO26262
Efficient methodology for ISO26262 functional safety verification
Combining fault analysis technologies for ISO26262 functional safety verification
Determined-safe faults identification : a step towards ISO26262 hardware compliant designs
Automated identification of application-dependent safe faults in automotive systems-on-a-chips
122
newspaper article
Mikk Raud: Eestil on aeg oma kiibipotentsiaal ellu äratada
Arjakas, Merili
diplomaatia.ee
2023
newspaper article
123
book article
Mikroelektroonika kiipide testimise tarkvara turbo-tester : kommentaar Eesti Teaduste Akadeemia Bernhard Schmidti preemia pälvinud tööle
Raik, Jaan
Tallinna Tehnikaülikooli aastaraamat 2007
2008
/
lk. 275-278
book article
124
journal article
Mitut kiipsüsteemi on vaja?
Tammemäe, Kalle
A & A
2002
/
6, lk. 51-54
journal article
125
dissertation
Model synthesis from VHDL for the functional test generation system
Krupnova, Helena
1993
https://www.ester.ee/record=b2090509*est
dissertation
Number of records 203, displaying
101 - 125
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