Searching - TalTech Research Portal

display

sort

26

book article

E-learning tools for digital testDevadze, Sergei; Gorjachev, R.; Jutman, Artur; Orasson, Elmet; Rosin, Vjatšeslav; Ubar, Raimund-JohannesProc. III International Conference "Distance Learning - Educational Sphere of XXI Century" : Minsk, Belorussia, 20032003 / p. 336-342

book article

27

book article

Embedded instrumentation toolbox for screening marginal defects and outliers for productionOdintsov, Sergei; Jutman, Artur; Devadze, Sergei; Aleksejev, IgorIEEE AUTOTESTCON 2017 : Schaumburg, USA, Sept 11-14, 2017 : proceedings2017 / p. 336-334 : ill https://doi.org/10.1109/AUTEST.2017.8080516

book article

28

book article

Embedded synthetic instruments for board-level testingJutman, Artur; Devadze, Sergei; Aleksejev, Igor; Wenzel, ThomasProceedings : 2012 17th IEEE European Test Symposium (ETS) : May 28th–June 1st, 2012, Annecy, France2012 / 1 p. : ill

book article

29

journal article

Environment for the analysis of functional self-test quality in digital systemsUbar, Raimund-Johannes; Kostin, Sergei; Kruus, Helena; Aarna, Margit; Devadze, SergeiProceedings of the Estonian Academy of Sciences2014 / p. 151-162 : ill https://artiklid.elnet.ee/record=b2673964*est

journal article

30

journal article

Exact parallel critical path fault tracing to speed-up fault simulation in sequential circuitsKõusaar, Jaak; Ubar, Raimund-Johannes; Kostin, Sergei; Devadze, Sergei; Raik, JaanInternational journal of microelectronics and computer science2018 / p. 9−18 https://ijmcs.dmcs.pl/web/guest/vol.-9-no.-1 https://ijmcs.dmcs.pl/documents/10630/345460/IJMCS_1_2018_2.pdf

journal article

31

book article

Fast extended test access via JTAG and FPGAsDevadze, Sergei; Jutman, Artur; Aleksejev, Igor; Ubar, Raimund-JohannesInternational Test Conference 2009 : November 1 - November 6, 2009, Austin Convention Center, Austin, Texas USA : proceedings2009 / p. 1-7 : ill http://dx.doi.org/10.1109/TEST.2009.5355668

book article

32

book article

Fast fault simulation for extended class of faults in scan-path circuitsUbar, Raimund-Johannes; Devadze, Sergei; Raik, Jaan; Jutman, ArturProceedings : Fifth IEEE International Symposium on Electronic Design, Test and Applications : DELTA 2010 : 13-15 January 2010, Ho Chi Minh City, Vietnam2010 / p. 14-19 https://ieeexplore.ieee.org/document/5438717

book article

33

book article

Fault management instrumentation network based on IEEE P1687 IJTAGShibin, Konstantin; Jutman, Artur; Devadze, SergeiEuropean Test Symposium (ETS), 2013, Avignon, France2013

book article

34

dissertation

Fault simulation of digital systems = Digitaalsüsteemide rikete simuleerimineDevadze, Sergei2009 https://digi.lib.ttu.ee/i/?445 https://www.ester.ee/record=b2508727*est

dissertation

35

book article

Fault simulation with parallel critical path tracing for combinational circuits using structurally synthesized BDDsDevadze, Sergei; Raik, Jaan; Jutman, Artur; Ubar, Raimund-Johannes7th IEEE Latin American Test Workshop LATW'06 : Buenos Aires, Argentina, March 26th-29th, 2006 : proceedings2006 / p. 97-102 : ill

book article

36

book article

Fault simulation with parallel exact critical path tracing in multiple core environmentGorev, Maksim; Ubar, Raimund-Johannes; Devadze, SergeiProceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE) : 9-13 March 2015, Grenoble, France2015 / p. 1180-1185 : ill

book article

37

dissertation

FPGA-based embedded virtual instrumentation = FPGA-sisesed virtuaalsed test- ja mõõtevahendidAleksejev, Igor2013 http://www.ester.ee/record=b2927687*est

dissertation

38

book article

FPGA-based synthetic instrumentation for board testAleksejev, Igor; Jutman, Artur; Devadze, Sergei; Odintsov, Sergei; Wenzel, ThomasProceedings : International Test Conference 20122012 / p. 1-10 : ill

book article

39

book article

FSM decomposition software for education and researchDevadze, Sergei; Sudnitsõn, AleksanderProc. IEEE EUROCON 2005 International Conference on Computer as a tool : Belgrade, Serbia & Montenegro2005 / p. 839-842 https://ieeexplore.ieee.org/document/1630063

book article

40

journal article

Functional self-test of high-performance pipe-lined signal processing architecturesGorev, Maksim; Ubar, Raimund-Johannes; Ellervee, Peeter; Devadze, Sergei; Raik, Jaan; Min, MartMicroprocessors and microsystems2015 / p. 909-918 : ill http://dx.doi.org/10.1016/j.micpro.2014.11.002

journal article

41

book article

Hardware/Software co-design in practice : MEMOCODE'08 contest experienceReinsalu, Uljana; Devadze, Sergei; Jutman, Artur; Tšertov, Anton; Ellervee, PeeterInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 55-58 : ill

book article

42

journal article EST / journal article ENG

Health management for self-aware SoCs based on IEEE 1687 infrastructureShibin, Konstantin; Devadze, Sergei; Jutman, Artur; Grabmann, Martin; Pricken, RobinIEEE Design & Test2017 / p. 27-35 : ill https://doi.org/10.1109/MDAT.2017.2750902 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

43

book article

Hierarchical calculation of malicious faults for evaluating the fault-toleranceUbar, Raimund-Johannes; Devadze, Sergei; Jenihhin, Maksim; Raik, Jaan; Jervan, Gert; Ellervee, PeeterProceedings : Fourth IEEE International Symposium on Electronic Design, Test and Applications : [DELTA 2008] : 23-25 January 2008, Hong Kong, SAR, China2008 / p. 222-227 : ill https://ieeexplore.ieee.org/document/4459544

book article

44

book article

Hierarchical timing-critical paths analysis in sequential circuitsJürimägi, Lembit; Ubar, Raimund-Johannes; Jenihhin, Maksim; Raik, Jaan; Devadze, Sergei; Kostin, Sergei2018 IEEE 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2018) : 2 – 4 July 2018, Spain2018 / 6 p. : ill https://doi.org/10.1109/PATMOS.2018.8464176

book article

45

book article

High-speed logic level fault simulationUbar, Raimund-Johannes; Devadze, SergeiDesign and test technology for dependable systems-on-chip2011 / p. 310-335 : ill

book article

46

book article

HLS-based optimization of tau triggering algorithm for LHC: a case studyCherezova, Natalia; Mihhailov, Dmitri; Devadze, Sergei; Jutman, Artur2022 18th Biennial Baltic Electronics Conference (BEC)2022 / 6 p. : ill https://doi.org/10.1109/BEC56180.2022.9935599

book article

47

book article

IEEE 1687 compliant ecosystem for embedded instrumentation access and in-field health monitoringTšertov, Anton; Jutman, Artur; Shibin, Konstantin; Devadze, SergeiIEEE AUTOTESTCON 2018 : National Harbor, September 17-20, 2018 : proceedings2018 / 9 p.: ill https://doi.org/10.1109/AUTEST.2018.8532559

book article

48

book article

IEEE P1687 IJTAG demonstrator on FPGAShibin, Konstantin; Aleksejev, Igor; Jutman, Artur; Devadze, SergeiDATE 2012 University Booth : Design Automation and Test in Europe : Dresden, Germany, March 12-16, 20122012 / 1 p. : ill

book article

49

journal article

In-system programming of non-volatile memories on microprocessor-centric boardsTšertov, Anton; Devadze, Sergei; Jutman, Artur; Jasnetski, ArtjomInternational journal of microelectronics and computer science2014 / p. 25-34 : ill

journal article

50

book article

Invited paper: System-Wide Fault Management based on IEEE P1687 IJTAGJutman, Artur; Devadze, Sergei; Aleksejev, Jevgeni6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) : 20-22 June 2011, Montpeillier, France2011 / [4] p.: ill https://ieeexplore.ieee.org/document/5981520

book article

Devadze, Sergei (author)

types of item

author 81

CV 46

name of the person 15