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351

artikkel kogumikus

High-level test data generation for software based self-test in microprocessorsOyeniran, Adeboye Stephen; Jasnetski, Artjom; Tšertov, Anton; Ubar, Raimund-Johannes2017 6th Mediterranean Conference on Embedded Computing (MECO) : including ECYPS'2017 : proceedings : research monograph : Bar, Montenegro, June 11th-15th, 20172017 / p. 86-91 : ill https://doi.org/10.1109/MECO.2017.7977167

artikkel kogumikus

352

artikkel kogumikus

High-level test generation for processing elements in many-core systemsOyeniran, Adeboye Stephen; Ubar, Raimund-Johannes; Azad, Siavoosh Payandeh; Raik, Jaan12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC2017), July 12-14, 2017, Madrid, Spain : proceedings2017 / 8 p. : ill http://dx.doi.org/10.1109/ReCoSoC.2017.8016156

artikkel kogumikus

353

artikkel kogumikus

High-level test synthesis with hierarchical test generationJervan, Gert; Eles, Petru; Peng, Zebo; Raik, Jaan; Ubar, Raimund-Johannes17th NORCHIP Conference : Oslo, Norway, 8-9 November 1999 : proceedings1999 / p. 291-296

artikkel kogumikus

354

artikkel kogumikus

High-speed logic level fault simulationUbar, Raimund-Johannes; Devadze, SergeiDesign and test technology for dependable systems-on-chip2011 / p. 310-335 : ill

artikkel kogumikus

355

artikkel kogumikus

How to generate high quality tests for digital systemsUbar, Raimund-Johannes; Aarna, Margit; Kruus, Helena; Raik, Jaan2004 International Semiconductor Conference : 27th edition, October 4-6, 2004, Sinaia, Romania : CAS 2004 proceedings. Volume 22004 / p. 459-462 : ill http://dx.doi.org/10.1109/SMICND.2004.1403048

artikkel kogumikus

356

artikkel kogumikus

How to prove that a circuit is fault-free?Ubar, Raimund-Johannes; Kostin, Sergei; Raik, JaanProceedings : 15th Euromicro Conference on Digital System Design DSD 2012 : 5-8 September 2012, Cesme, Izmir, Turkey2012 / p. 427-430 : ill https://www.researchgate.net/publication/262271409_How_to_Prove_that_a_Circuit_is_Fault-Free

artikkel kogumikus

357

artikkel kogumikus

A hybrid BIST architecture and its optimization for SoC testingJervan, Gert; Peng, Zebo; Ubar, Raimund-Johannes; Kruus, HelenaProceedings of the 3rd International Symposium on Quality Electronic Design : ISQED 2002, March 18-21, 2002, San Jose, California2002 / p. 273-279 : ill https://ieeexplore.ieee.org/document/996750

artikkel kogumikus

358

artikkel ajakirjas

Hybrid BIST methodology for testing core-based systemsJervan, Gert; Ubar, Raimund-Johannes; Peng, ZeboProceedings of the Estonian Academy of Sciences. Engineering2006 / 3-2, p. 300-322 : ill

artikkel ajakirjas

359

artikkel kogumikus

Hybrid BIST optimization for core-based systems with test pattern broadcastingUbar, Raimund-Johannes; Jenihhin, Maksim; Jervan, Gert; Peng, ZeboDELTA 2004 : second IEEE International Workshop on Electronic Design, Test and Applications : 28-30 January 2004, Perth, Australia : proceedings2004 / p. 3-8 : ill https://ieeexplore.ieee.org/document/1409808

artikkel kogumikus

360

artikkel kogumikus

Hybrid BIST optimization using reseeding and test set compactionJervan, Gert; Orasson, Elmet; Kruus, Helena; Ubar, Raimund-Johannes10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007 : 29-31 August 2007, Lübeck, Germany : proceedings2007 / p. 596-603 : ill http://dx.doi.org/10.1109/DSD.2007.4341529

artikkel kogumikus

361

artikkel ajakirjas

Hybrid BIST optimization using reseeding and test set compactionJervan, Gert; Orasson, Elmet; Kruus, Helena; Ubar, Raimund-JohannesMicroprocessors and microsystems2008 / 5/6, p. 254-262 : ill https://www.sciencedirect.com/science/article/abs/pii/S0141933108000288

artikkel ajakirjas

362

artikkel kogumikus

Hybrid BIST scheduling for NoC-based SoCsJervan, Gert; Shchenova, Tatjana; Ubar, Raimund-JohannesProceedings [of] 24th IEEE Norchip Conference : Linköping, Sweden, 20-21 November 20062006 / p. 141-144 : ill https://ieeexplore.ieee.org/document/4126966

artikkel kogumikus

363

artikkel kogumikus

Hybrid BIST time minimization for core-based systems with STUMPS architectureJervan, Gert; Eles, Petru; Peng, Zebo; Ubar, Raimund-Johannes; Jenihhin, Maksim18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems : 3-5 November 2003, Boston, Massachusetts : proceedings2003 / p. 225-232 : ill https://ieeexplore.ieee.org/document/1250116

artikkel kogumikus

364

dissertatsioon

Hybrid built-in self-test : methods and tools for analysis and optimization of BIST = Sisseehitatud hübriidne isetestimine : meetodid ja vahendid analüüsiks ning optimeerimiseksOrasson, Elmet2007 https://www.ester.ee/record=b2305436*est

dissertatsioon

365

artikkel kogumikus

Hybrid functional BIST for digital systemsMazurova, Natalja; Smahtina, Julia; Ubar, Raimund-JohannesBEC 2004 : proceedings of the 9th Biennial Baltic Electronics Conference : October 3-6, 2004, Tallinn, Estonia2004 / p. 205-208 : ill

artikkel kogumikus

366

artikkel kogumikus

HyFBIST : hybrid functional built-in self-test in microprogrammed data-paths of digital systemsUbar, Raimund-Johannes; Mazurova, Natalja; Smahtina, Julia; Orasson, Elmet; Raik, JaanProceedings of the 11th International Conference : Mixed Design of Integrated Circuits and Systems : MIXDES 2004 : Szczecin, Poland, 24-26 June 20042004 / p. 497-502 : ill

artikkel kogumikus

367

artikkel ajakirjas

"Ideat ovat pääomaamme" : [Raimund Ubar]Ubar, Raimund-JohannesNet1992 / s. 20 : kuva

artikkel ajakirjas

368

artikkel ajakirjas EST / artikkel ajakirjas ENG

Identification and rejuvenation of NBTI-critical logic paths in nanoscale circuitsJenihhin, Maksim; Squillero, Giovanni; Tihhomirov, Valentin; Kostin, Sergei; Raik, Jaan; Ubar, Raimund-JohannesJournal of electronic testing : theory and applications (JETTA)2016 / p. 273-289 : ill https://doi.org/10.1007/s10836-016-5589-x Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

artikkel ajakirjas EST / artikkel ajakirjas ENG

369

artikkel kogumikus

Identifying NBTI-critical paths in nanoscale logicUbar, Raimund-Johannes; Vargas, Fabian; Jenihhin, Maksim; Raik, Jaan; Kostin, Sergei; Bolzani Poehls, Leticia16th Euromicro Conference series on Digital System Design : DSD 2013 : proceedings : 4-6 September 2013, Santander, Spain2013 / p. 136-141 : ill

artikkel kogumikus

370

artikkel ajakirjas

Identifying untestable faults in sequential circuits using test path constraintsViilukas, Taavi; Karputkin, Anton; Raik, Jaan; Jenihhin, Maksim; Ubar, Raimund-Johannes; Fujiwara, HideoJournal of electronic testing : theory and applications (JETTA)2012 / p. 511-521 : ill https://link.springer.com/article/10.1007/s10836-012-5312-5

artikkel ajakirjas

371

artikkel kogumikus

Implementation-independent functional test for transition delay faults in microprocessorsOyeniran, Adeboye Stephen; Ubar, Raimund-Johannes; Jenihhin, Maksim; Raik, Jaan2020 23rd Euromicro Conference on Digital System Design (DSD), 26-28 August 2020, Kranj, Slovenia2020 / p. 646-650 https://doi.org/10.1109/DSD51259.2020.00105

artikkel kogumikus

372

artikkel kogumikus

Implementation-independent functional test generation for RISC microprocessorsOyeniran, Adeboye Stephen; Ubar, Raimund-Johannes; Jenihhin, Maksim; Raik, JaanVLSI-SoC 2019 : 27th IFIP/IEEE International Conference on Very Large Scale Integration : [proceedings]2019 / p. 82-87 : ill https://doi.org/10.1109/VLSI-SoC.2019.8920323

artikkel kogumikus

373

artikkel kogumikus

Implementation-independent test generation for a large class of faults in RISC processor modulesJenihhin, Maksim; Oyeniran, Adeboye Stephen; Raik, Jaan; Ubar, Raimund-Johannes24th Euromicro Conference on Digital System Design (DSD)2021 https://doi.org/10.1109/DSD53832.2021.00090

artikkel kogumikus

374

artikkel kogumikus

An improved estimation methodology for hybrid BIST cost calculationJervan, Gert; Peng, Zebo; Ubar, Raimund-Johannes; Korelina, OlgaProceedings [of] 22nd NORCHIP Conference : Oslo, Norway, 8-9 November 20042004 / p. 297-300 : ill https://ieeexplore.ieee.org/document/1423882

artikkel kogumikus

375

artikkel kogumikus

An improved estimation technique for hybrid BIST test set generationJervan, Gert; Peng, Zebo; Ubar, Raimund-Johannes; Korelina, OlgaDDECS : 8th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems : April 13-16, 2005, Sopron, Hungary : proceedings2005 / p. 182-185 : ill

artikkel kogumikus

Ubar, Raimund-Johannes (TTÜ autor)

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