Otsing - TalTech teadusportaal

Publikatsioonid
Profiilid
Uurimisrühmad
Registrid
Abi ja info
Switch to English

Publikatsioonid

Publikatsioonid

Otsing

Valitud kirjed 0

gate-level analysis (võtmesõna)

—

—

—

—

Lisa tingimus Liitotsing filter

Tühista

teaviku laadid

raamat ..

artikkel ajakirjas ..

artikkel ajalehes ..

artikkel kogumikus ..

dissertatsioon ..

Open Access ..

Teaduspublikatsioon ..

aasta

Toon andmeid..

Toon andmeid..

TTÜ struktuuriüksus

Toon andmeid..

Toon andmeid..

Toon andmeid..

Toon andmeid..

Toon andmeid..

Tühista

Kirjeid leitud 3
Vaata veel.. (1/154)
Ekspordi

ekspordi kõik päringu tulemused (3)
Salvesta TXT fail

Salvesta PDF fail

prindi
Märgitud kirjetega toimetamiseks ava valitud kirjed

kuva

reasta
1

artikkel ajakirjas EST / artikkel ajakirjas ENG

Fast identification of true critical paths in sequential circuitsUbar, Raimund-Johannes; Kostin, Sergei; Jenihhin, Maksim; Raik, Jaan; Jürimägi, LembitMicroelectronics reliability2018 / p. 252-261 : ill https://doi.org/10.1016/j.microrel.2017.11.027 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

artikkel ajakirjas EST / artikkel ajakirjas ENG
2

artikkel kogumikus

Hierarchical timing-critical paths analysis in sequential circuitsJürimägi, Lembit; Ubar, Raimund-Johannes; Jenihhin, Maksim; Raik, Jaan; Devadze, Sergei; Kostin, Sergei2018 IEEE 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2018) : 2 – 4 July 2018, Spain2018 / 6 p. : ill https://doi.org/10.1109/PATMOS.2018.8464176

artikkel kogumikus
3

artikkel kogumikus

A scalable technique to identify true critical paths in sequential circuitsUbar, Raimund-Johannes; Kostin, Sergei; Jenihhin, Maksim; Raik, JaanProceedings 2017 IEEE 20th International Symposium on Design and Diagnotics of Electronic Circuit & Systems(DDECS) : April 19-21, 2017, Dresden, Germany2017 / p. 152-157 : ill https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7934553

artikkel kogumikus

Kirjeid leitud 3, kuvan 1 - 3

1. gate-level analysis
2. gate-level circuit abstraction
3. gate-level netlist
4. register transfer and gate level simulation
5. hierarchical two-level analysis
6. system-level analysis
7. logic level and high level BDDs
8. Field Programmable Gate Array (FPGA)
9. field programmable gate arrays
10. field-programmable gate array
11. Field-Programmable Gate Array (FPGA)
12. field-programmable gate arrays
13. field-programmable gate arrays (FPGA)
14. FPGA (field-programmable gate array)
15. GaTe
16. gate and register transfer levels
17. gate delay
18. gate driver
19. Gate Injection Transistor (GIT)
20. Golden gate assembly
21. insulated gate bipolar transistors
22. insulated gate-commutated thyristors
23. NBTI-critical gate
24. Opal Kelly ﬁeld programmable gate array (FPGA)
25. absolute sea level
26. airport level of service
27. arousal level
28. assurance level
29. behaviour level test generation
30. bi-level optimization
31. CO2 level in classrooms
32. CO2 level in classrooms and kindergartens
33. confidence level
34. country-level logistics
35. Cross-level Modeling of Faults in Digital Systems
36. customer compatibility level
37. deep level
38. deep level traps
39. determination of the CO2 level
40. determining the level of creatine
41. digitalisation level
42. distribution-level phasor measurement units (D-PMUs)
43. education level
44. exposure level
45. extreme penetration level of non synchronous generation
46. extreme water level
47. graduate level
48. Hierarchical Multi-level Test Generation
49. high level DD (HLDD)
50. high level synthesis
51. high-level control fault model
52. high-level control faults
53. high-level decision diagram
54. high-level decision diagrams
55. high-level decision diagrams (HLDD) synthesis
56. High-level Decision Diagrams for Modeling Digital Systems
57. high-level expert group on AI
58. high-level fault coverage
59. high-level fault model
60. high-level fault simulation
61. high-level functional fault model
62. high-level synthesis
63. High-Level Synthesis (HLS)
64. high-level synthesis for test
65. high-level test data generation
66. improvement of safety level at enterprises
67. improvement of safety level at SMEs
68. level control
69. level crossing
70. Level of paranoia
71. level set
72. level(s) methodology
73. level-crossing ADC
74. level-crossing analog-to-digital converters
75. level-crossing analogue-to-digital converters (ADC)
76. logic level
77. lower trophic level models
78. low-level control system transportation
79. low-level fault redundancy
80. low-level radiation
81. Low-level RF EMF
82. macro-level industry influences
83. mean sea level
84. module level power electronics (MLPE)
85. module-level power electronics (MLPE)
86. multi-level governance
87. multi-level inverter
88. multi-level modeling
89. multi-level perspective
90. multi-level perspective of sustainability transitions
91. multi-level selection and processing environment
92. operational level (OL)
93. Price level
94. Process/Product Sigma Performance Level (PSPL)
95. PV module level power electronics
96. Register Transfer Level - RTL
97. register transfer level modeling decision diagams
98. register-transfer level
99. relative sea level
100. relative sea level changes
101. relative sea-level change
102. RH level
103. school-level policies
104. sea level
105. sea level forecasting
106. sea level prediction
107. sea level rise
108. sea level series
109. sea level trend
110. sea level: variations and mean
111. sea-level
112. sea-level changes
113. sea-level equation
114. Sea-level indicator
115. sea-level prediction
116. sea-level rise
117. sea-level trend
118. service-level agreements
119. seven-level multilevel
120. Sigma performance level
121. skin conductance level
122. software level TMR
123. steel-level bureaucracy
124. strategic level decision makers
125. system level
126. system level hazards
127. system level test
128. system planning level
129. system-level evaluation
130. task-level uninterrupted presence
131. three-level
132. three-level converter
133. three-level inverter
134. three-level neutral-point-clamped inverter
135. three-level NPC inverter
136. three-level T-type
137. three-level T-type inverter
138. three-level T-type quasi-impedance-source inverter (3L-T-type qZSI)
139. three-level voltage inverter
140. Tool Confidence Level
141. top-level domain
142. transaction-level modeling
143. treatment level
144. two-level inverter
145. undergraduate level
146. university level informatics education
147. water level
148. water level fluctuation
149. water level measurements
150. water level reconstruction
151. water-level changes
152. voltage level
153. voltage level optimisation
154. 3-level T-type inverter

vaste

reasta

Otsing
Valikud 0

ilmumisaasta

autor

TTÜ struktuuriüksus

märksõna

seeria-sari

tema kohta

võtmesõna

TalTech Raamatukogu

Akadeemia tee 1

13519

TalTech koduleht TalTech Raamatukogu koduleht Digikogu Digiteek Teadusandmed

6203551

data@taltech.ee

TalTech Raamatukogu