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gate-level analysis (võtmesõna)

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Kirjeid leitud 3
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ekspordi kõik päringu tulemused (3)
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Fast identification of true critical paths in sequential circuitsUbar, Raimund-Johannes; Kostin, Sergei; Jenihhin, Maksim; Raik, Jaan; Jürimägi, LembitMicroelectronics reliability2018 / p. 252-261 : ill https://doi.org/10.1016/j.microrel.2017.11.027 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

artikkel ajakirjas EST / artikkel ajakirjas ENG
2

artikkel kogumikus

Hierarchical timing-critical paths analysis in sequential circuitsJürimägi, Lembit; Ubar, Raimund-Johannes; Jenihhin, Maksim; Raik, Jaan; Devadze, Sergei; Kostin, Sergei2018 IEEE 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2018) : 2 – 4 July 2018, Spain2018 / 6 p. : ill https://doi.org/10.1109/PATMOS.2018.8464176

artikkel kogumikus
3

artikkel kogumikus

A scalable technique to identify true critical paths in sequential circuitsUbar, Raimund-Johannes; Kostin, Sergei; Jenihhin, Maksim; Raik, JaanProceedings 2017 IEEE 20th International Symposium on Design and Diagnotics of Electronic Circuit & Systems(DDECS) : April 19-21, 2017, Dresden, Germany2017 / p. 152-157 : ill https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7934553

artikkel kogumikus

Kirjeid leitud 3, kuvan 1 - 3

1. gate-level analysis
2. gate-level circuit abstraction
3. gate-level netlist
4. register transfer and gate level simulation
5. hierarchical two-level analysis
6. system-level analysis
7. logic level and high level BDDs
8. Field Programmable Gate Array (FPGA)
9. field programmable gate arrays
10. field-programmable gate array
11. Field-Programmable Gate Array (FPGA)
12. field-programmable gate arrays
13. field-programmable gate arrays (FPGA)
14. FPGA (field-programmable gate array)
15. GaTe
16. gate and register transfer levels
17. gate delay
18. gate driver
19. Gate Injection Transistor (GIT)
20. Golden gate assembly
21. insulated gate bipolar transistors
22. insulated gate-commutated thyristors
23. NBTI-critical gate
24. Opal Kelly ﬁeld programmable gate array (FPGA)
25. absolute sea level
26. airport level of service
27. arousal level
28. assurance level
29. behaviour level test generation
30. bi-level optimization
31. CO2 level in classrooms
32. CO2 level in classrooms and kindergartens
33. confidence level
34. country-level logistics
35. Cross-level Modeling of Faults in Digital Systems
36. customer compatibility level
37. deep level
38. deep level traps
39. determination of the CO2 level
40. determining the level of creatine
41. digitalisation level
42. distribution-level phasor measurement units (D-PMUs)
43. education level
44. exposure level
45. extreme penetration level of non synchronous generation
46. extreme water level
47. graduate level
48. Hierarchical Multi-level Test Generation
49. high level DD (HLDD)
50. high level synthesis
51. high-level control fault model
52. high-level control faults
53. high-level decision diagram
54. high-level decision diagrams
55. high-level decision diagrams (HLDD) synthesis
56. High-level Decision Diagrams for Modeling Digital Systems
57. high-level expert group on AI
58. high-level fault coverage
59. high-level fault model
60. high-level fault simulation
61. high-level functional fault model
62. high-level synthesis
63. High-Level Synthesis (HLS)
64. high-level synthesis for test
65. high-level test data generation
66. improvement of safety level at enterprises
67. improvement of safety level at SMEs
68. level control
69. level crossing
70. Level of paranoia
71. level set
72. level(s) methodology
73. level-crossing ADC
74. level-crossing analog-to-digital converters
75. level-crossing analogue-to-digital converters (ADC)
76. logic level
77. lower trophic level models
78. low-level control system transportation
79. low-level fault redundancy
80. low-level radiation
81. Low-level RF EMF
82. macro-level industry influences
83. mean sea level
84. module level power electronics (MLPE)
85. module-level power electronics (MLPE)
86. multi-level governance
87. multi-level inverter
88. multi-level leadership
89. multi-level modeling
90. multi-level perspective
91. multi-level perspective of sustainability transitions
92. multi-level selection and processing environment
93. operational level (OL)
94. Price level
95. Process/Product Sigma Performance Level (PSPL)
96. PV module level power electronics
97. Register Transfer Level - RTL
98. register transfer level modeling decision diagams
99. register-transfer level
100. relative sea level
101. relative sea level changes
102. relative sea-level change
103. RH level
104. school-level policies
105. sea level
106. sea level forecasting
107. sea level prediction
108. sea level rise
109. sea level series
110. sea level trend
111. sea level: variations and mean
112. sea-level
113. sea-level changes
114. sea-level equation
115. Sea-level indicator
116. sea-level prediction
117. sea-level rise
118. sea-level trend
119. service-level agreements
120. seven-level multilevel
121. Sigma performance level
122. skin conductance level
123. software level TMR
124. steel-level bureaucracy
125. strategic level decision makers
126. system level
127. system level hazards
128. system level test
129. system planning level
130. system-level evaluation
131. task-level uninterrupted presence
132. three-level
133. three-level converter
134. three-level inverter
135. three-level neutral-point-clamped inverter
136. three-level NPC inverter
137. three-level T-type
138. three-level T-type inverter
139. three-level T-type quasi-impedance-source inverter (3L-T-type qZSI)
140. three-level voltage inverter
141. Tool Confidence Level
142. top-level domain
143. transaction-level modeling
144. treatment level
145. two-level inverter
146. undergraduate level
147. university level informatics education
148. water level
149. water level fluctuation
150. water level measurements
151. water level reconstruction
152. water-level changes
153. voltage level
154. voltage level optimisation
155. 3-level T-type inverter

1. Safety Gate

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