On test generation for microprocessors for extended class of functional faults
statement of authorship
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, and Jaan Raik
source
VLSI-SoC: New technology enabler : 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019 Cusco, Peru, October 6–9, 2019 : Revised and Extended Selected Papers
location of publication
Cham
publisher
year of publication
pages
p. 21-44
conference name, date
27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, October 6–9, 2019
conference location
Cusco, Peru
ISSN
1868-4238
ISBN
978-3-030-53272-7
notes
Bibliogr.: 41 ref
Open Access
Open Access
scientific publication
teaduspublikatsioon
TTÜ department
language
inglise
category (general)
category (sub)
Oyeniran, A.S., Ubar, R., Jenihhin, M., Raik, J. On test generation for microprocessors for extended class of functional faults // VLSI-SoC: New technology enabler : 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019 Cusco, Peru, October 6–9, 2019 : Revised and Extended Selected Papers. Cham : Springer Nature, 2020. p. 21-44.