Searching - TalTech Research Portal

display

sort

1

journal article

A new testability calculation method to guide RTL test generationRaik, Jaan; Nõmmeots, Tanel; Ubar, Raimund-JohannesJournal of electronic testing : theory and applications2005 / p. 71-82 : ill https://doi.org/10.1007/s10836-005-5288-5

journal article

2

book article

An improved test generation approach for sequential circuits using decision diagramsBrik, Marina; Ubar, Raimund-JohannesBEC'98 : the 6th Biennial Conference on Electronics and Microsystems Technology, October 7-9, 1998, Tallinn, Estonia : proceedings1998 / p. 155-158: ill

book article

3

journal article

Application of high-level decision diagrams for simulation-based verification tasksJenihhin, Maksim; Raik, Jaan; Tšepurov, Anton; Ubar, Raimund-JohannesEstonian journal of engineering2010 / 1, p. 56-77 : ill

journal article

4

journal article

Application of structurally synthesized binary decision diagrams for timing simulation of digital circuitsJutman, Artur; Ubar, Raimund-JohannesProceedings of the Estonian Academy of Sciences. Engineering2001 / 4, p. 269-288 : ill

journal article

5

book article

Assertion checking with PSL and high-level decision diagramsJenihhin, Maksim; Raik, Jaan; Tšepurov, Anton; Ubar, Raimund-JohannesDigest of papers IEEE 8th Workshop on RTL and High Level Testing : WRTLT'07 : October 12-13, 2007, Beijing, China2007 / p. 105-110 : ill https://pld.ttu.ee/~maksim/phd_papers/%5B12%5D%20wrtlt%2707.pdf

book article

6

book article

Automated correction of design errors by edge redirection on high-level decision diagramsKarputkin, Anton; Ubar, Raimund-Johannes; Tombak, Mati; Raik, Jaan13th International Symposium on Quality Electronic Design (ISQED), 20122012 / p. 686-693 : ill https://ieeexplore.ieee.org/document/6113980

book article

7

journal article EST / journal article ENG

Automated design error debug using high-level decision diagrams and mutation operatorsRaik, Jaan; Repinski, Urmas; Tšepurov, Anton; Hantson, Hanno; Ubar, Raimund-Johannes; Jenihhin, MaksimMicroprocessors and microsystems2013 / p. 505-513 : ill https://doi.org/10.1016/j.micpro.2012.11.004 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

8

book article

Automated software-based self-test generation for microprocessorsJasnetski, Artjom; Ubar, Raimund-Johannes; Tšertov, AntonProceedings of the 24st International Conference Mixed Design of Integrated Circuits and Systems : MIXDES 2017 : Bydgoszcz, Poland, June 19-21, 20142017 / p. 453-458 : ill https://doi.org/10.23919/MIXDES.2017.8005252

book article

9

book article

Automated test program synthesis for digital systems with high-level decision diagramsUbar, Raimund-JohannesProc. of 7th International Conference2005 / p. 171-180

book article

10

book article

Automatic generation of EFSMs and HLDDs for functional ATPGTšepurov, Anton; Guglielmo, Giuseppe di; Raik, Jaan; Ubar, Raimund-Johannes; Viilukas, TaaviBEC 2008 : 2008 International Biennial Baltic Electronics Conference : proceedings of the 11th Biennial Baltic Electronics Conference : Tallinn University of Technology : October 6-8, 2008, Tallinn, Estonia2008 / p. 143-146 : ill

book article

11

book article

Boolean derivatives and multi-valued simulation on binary decision diagramsUbar, Raimund-JohannesProceedings of the 4th International Workshop Mixed Design of Integrated Circuits and Systems : MIXDES'97 : Poznan, Poland, 12-14 June 19971997 / p. 115-120

book article

12

book article

Calculation of testability measures on structurally synthesized binary decision diagramsUbar, Raimund-Johannes; Heinlaid, J.; Raik, Jaan; Raun, L.BEC'98 : the 6th Biennial Conference on Electronics and Microsystems Technology, October 7-9, 1998, Tallinn, Estonia : proceedings1998 / p. 179-182: ill

book article

13

journal article

Canonical representations of high-level decision diagramsKarputkin, Anton; Ubar, Raimund-Johannes; Raik, Jaan; Tombak, MatiEstonian journal of engineering2010 / 1, p. 39-55 : ill

journal article

14

book article

Code coverage analysis on high level decision diagramsReinsalu, UljanaInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK teise aastakonverentsi artiklite kogumik : 11.-12. mai 2007, Viinistu kunstimuuseum2007 / lk. 56-59 : ill

book article

15

book article

Code coverage analysis using high-level decision diagrams [Electronic resource]Raik, Jaan; Reinsalu, Uljana; Ubar, Raimund-Johannes; Jenihhin, Maksim; Ellervee, Peeter2008 IEEE Design and Diagnostics of Electronic Circuits and Systems : Bratislava, Slovakia, April 16-18, 20082008 / p. 201-207 : ill. [CD-ROM] https://ieeexplore.ieee.org/document/4538786

book article

16

book article

Compaction of decision diagrams for describing multi-process VHDL descriptionsLeveugle, R.; Saucier, Gabriele; Ubar, Raimund-JohannesBEC'98 : the 6th Biennial Conference on Electronics and Microsystems Technology, October 7-9, 1998, Tallinn, Estonia : proceedings1998 / p. 195-198: ill

book article

17

book article

Cycle-based simulation with decision diagramsUbar, Raimund-Johannes; Morawiec, Adam; Raik, JaanDesign, Automation and Test in Europe : DATE : Conference and Exhibition 1999 : Munich, Germany, March 9-12, 1999 : proceedings1999 / p. 454-458: ill https://ieeexplore.ieee.org/document/761165

book article

18

book article

DECIDER : a decision diagram based hierarchical test generation systemJervan, Gert; Markus, Antti; Raik, Jaan; Ubar, Raimund-JohannesProceedings of the 2nd International Workshop on Design and Diagnostics of Electronic Circuits and Systems, Szczyrk, Poland, September 2-4, 19981998 / p. 269-273 https://www.ida.liu.se/labs/eslab/publications/pap/db/DDECS98.pdf

book article

19

journal article

DECIDER : a system for hierarchical test pattern generationRaik, Jaan; Ubar, Raimund-JohannesRadioelectronics and informatics2003 / p. 40-45 : ill https://www.researchgate.net/publication/250395975_DECIDER_A_System_for_Hierarchical_Test_Pattern_Generation

journal article

20

book article

A decision diagram based hierarchical test pattern generatorJervan, Gert; Markus, Antti; Raik, Jaan; Ubar, Raimund-JohannesBEC'98 : the 6th Biennial Conference on Electronics and Microsystems Technology, October 7-9, 1998, Tallinn, Estonia : proceedings1998 / p. 159-162: ill

book article

21

journal article

Decision diagrams - from a mathematical notion to engineering applicationsStankovic, Radomir S.; Ubar, Raimund-Johannes; Astola, JaakkoFacta Universitatis [Niš]. Series electronics and energetics2011 / p. 281-301 : ill http://dx.doi.org/10.2298/FUEE1103281S

journal article

22

book article

Decision diagrams and digital testUbar, Raimund-JohannesECMS 2003 : 6th International Workshop on Electronics, Control, Measurment and Signals : Liberec, Czechia, June 2-4, 20032003 / p. 266-273 : ill http://www.midem-drustvo.si/Journal%20papers/MIDEM_35(2005)4p187.pdf

book article

23

book article

Decision diagrams and digital testUbar, Raimund-Johannes41th International Conference on Microelectronics, Devices and Materials : MIDEM 2005 : Ribno at Bled, Slovenia : invited plenary paper2005 / p. 15-26

book article

24

book article

Decision diagrams for diagnostic modelingUbar, Raimund-JohannesMEDIAN Finale : Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale : November 10-11, 2015, Tallinn, Estonia2015 / p. 43

book article

25

book article

Dependability evaluation in fault-tolerant systems with high-level decision diagramsUbar, Raimund-Johannes; Jervan, Gert; Raik, Jaan; Jenihhin, Maksim; Ellervee, PeeterComputer Science Meets Automation : 10-13 September 2007 : proceedings. Volume II2007 / p. 147-152 : ill https://www.db-thueringen.de/receive/dbt_mods_00008864

book article

otsustusdiagrammid (subject term)

types of item

subject term 1