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Eesti teadlased loodavad panna putukrobotile pähe tehisaruRaik, Jaannovaator.err.ee2024 Eesti teadlased loodavad panna putukrobotile pähe tehisaru Эстонские ученые создают робота-насекомого с искусственным интеллектом

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52

book article

Eesti teaduse nähtamatud hiiglasedRaik, JaanTeadusmõte Eestis (X). Tehnikateadused. 3 : [artiklikogumik]2019 / lk. 161-168 : ill., fot https://www.ester.ee/record=b5208765*est

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53

journal article EST / journal article ENG

Elliptic-curve crypto processor for RFID applicationsRashid, Muhammad; Jamal, Sajjad Shaukat; Khan, Sikandar Zulqarnain; Alharbi, Adel R.; Aljaedi, Amer; Imran, MalikApplied Sciences (Switzerland)2021 / art. 7079 https://doi.org/10.3390/app11157079 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

54

book article

Equivalent transformations of structurally synthesized BDDs and applicationsJürimägi, Lembit; Ubar, Raimund-Johannes; Viies, Vladimir2019 8th Mediterranean Conference on Embedded Computing (MECO)2019 / 6 p. : ill https://doi.org/10.1109/MECO.2019.8760283

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55

journal article

Error sources in analog ASICs and ways for their minimizationMihhailov, JuriInternational journal of engineering and applied sciences (EAAS)2013 / p. 32-41 : ill

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56

journal article

Esimene üldkasutatav mikrokontrollerkiip TMS 1000Toomsalu, ArvoA & A2008 / 2, lk. 9-16 : ill

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57

book

European Test Symposium : ETS 2005 : 22-25 May 2005, Tallinn, Estonia : proceedingsCantarella, JD2005 https://www.ester.ee/record=b2300865*est

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58

journal article EST / journal article ENG

Evaluating architectural, redundancy, and implementation strategies for radiation hardening of FinFET integrated circuitsPagliarini, Samuel Nascimento; Benites, Luis; Martins, Mayler; Rech, Paolo; Kastensmidt, FernandaIEEE transactions on nuclear science2021 / p. 1045-1053 https://doi.org/10.1109/TNS.2021.3070643 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

59

book article

Fast test cost calculation for hybrid BIST in digital systemsOrasson, Elmet; Raidma, Rein; Ubar, Raimund-Johannes; Jervan, Gert; Peng, ZeboEuromicro Symposium on Digital Systems Design : [Architectures, Methods and Tools : DSD 2001] : September 4-6, 2001, Warsaw, Poland : proceedings2001 / p. 318-325 : ill https://www.semanticscholar.org/paper/Fast-test-cost-calculation-for-hybrid-BIST-in-Orasson-Raidma/5aafcda5a18c2aabf0ad20cac10af10727f3c58f

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60

book article

Fault collapsing with linear complexity in digital circuitsUbar, Raimund-Johannes; Mironov, Dmitri; Raik, Jaan; Jutman, ArturProceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS 2010) : 30 May - 2 June 2010, Paris, France2010 / p. 653-656 : ill https://ieeexplore.ieee.org/document/5537504

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61

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Fault diagnosis in integrated circuits with BISTUbar, Raimund-Johannes; Kostin, Sergei; Raik, Jaan; Evartson, Teet; Lensen, Harri10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007 : 29-31 August 2007, Lübeck, Germany : proceedings2007 / p. 604-610 : ill http://dx.doi.org/10.1109/DSD.2007.4341530

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62

journal article

Fault diagnosis in VLSI devicesUbar, Raimund-JohannesProceedings of the Estonian Academy of Sciences. Engineering1995 / 1, p. 51-67

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63

journal article

Fault effect reasoning in digital systems by topological view on low- and high-level decision diagramsUbar, Raimund-JohannesВестник Томского государственного университета. Управление, вычислительная техника и информатика2014 / p. 99-113 : ill http://journals.tsu.ru/informatics/&journal_page=archive&id=923&article_id=12107

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64

book article

Fault simulation with parallel critical path tracing for combinational circuits using structurally synthesized BDDsDevadze, Sergei; Raik, Jaan; Jutman, Artur; Ubar, Raimund-Johannes7th IEEE Latin American Test Workshop LATW'06 : Buenos Aires, Argentina, March 26th-29th, 2006 : proceedings2006 / p. 97-102 : ill

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65

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Faults and fault models for integrated circuits and systems [Electronic resource] : [slides]Ubar, Raimund-JohannesDesign and Test Technology for Dependable Hardware/Software Systems : DEDIS/DAAD Summer Academy : BTU Cottbus, Sept. 1st-12th, 20082008 / [64] p. : ill. [CD-ROM]

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66

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Finite state machines with datapath partitioning for low power synthesisSudnitsõn, AleksanderProceedings of the 8th International Conference Mixed Design of Integrated Circuits and Systems : MIXDES 2001 : Zakopane, Poland, 21-23 June 20002001 / p. 163-168 : ill

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67

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Foreword to the 12th IEEE DDECS SymposiumPliva, Zdenek; Manhaeve, Hans; Renovell, Michel; Novak, Ondrej; Ubar, Raimund-Johannes; Drabkova, JindraProceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems : April 15-17, 2009, Liberec, Czech Republic2009 / p. iii http://dx.doi.org/10.1109/DDECS.2009.5012081

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68

journal article

From virtual characterization to test-chips : DFM analysis through pattern enumerationMartins, Mayler G.A.; Pagliarini, Samuel Nascimento; Isgenc, Mehmet Meric; Pileggi, LarryIEEE transactions on computer-aided design of integrated circuits and systems2020 / p. 520-532 https://doi.org//10.1109/TCAD.2018.2889772

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69

book article

Gate-level modelling of NBTI-induced delays under process variationsCopetti, Thiago; Cardoso Medeiros, Guilherme; Bolzani Poehls, Leticia; Vargas, Fabian; Kostin, Sergei; Jenihhin, Maksim; Raik, Jaan; Ubar, Raimund-JohannesLATS 2016 : 17th IEEE Latin-American Test Symposium, Foz do Iguacu, Brazil, 6th-9th April 20162016 / p. 75-80 : ill http://dx.doi.org/10.1109/LATW.2016.7483343

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70

dissertation

Hardware realization of lattice-based post-quantum cryptography = Võrel põhinev post-kvant-krüptograafia riistvaraline realisatsioonImran, Malik2023 https://www.ester.ee/record=b5571216*est https://doi.org/10.23658/taltech.33/2023 https://digikogu.taltech.ee/et/Item/75aeb070-cb8b-4511-beaf-cbea3fca147d https://www.ester.ee/record=b5571216*est

dissertation

Seotud publikatsioonid 6

71

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Hardware/software co-design for programmable systems-on-chipSklyarov, Valery; Skliarova, Iouliia; Silva, João; Rjabov, Artjom; Sudnitsõn, Aleksander; Cardoso, Cláudia2014 http://www.ester.ee/record=b3087107*est

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72

book article

High-level decision diagram based fault models for targeting FSMsRaik, Jaan; Ubar, Raimund-Johannes; Viilukas, Taavi9th EUROMICRO Conference on Digital Systems Design : Architectures, Methods and Tools (DSD 2006) : 30 August 2006-1 September 2006, Cavtat near Dubrovnik, Croatia : proceedings2006 / p. 353-358 : ill http://dx.doi.org/10.1109/DSD.2006.60

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73

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High-Level Decision Diagram manipulations for code coverage analysisMinakova, Karina; Reinsalu, Uljana; Tšepurov, Anton; Raik, Jaan; Jenihhin, Maksim; Ubar, Raimund-Johannes; Ellervee, PeeterBEC 2008 : 2008 International Biennial Baltic Electronics Conference : proceedings of the 11th Biennial Baltic Electronics Conference : Tallinn University of Technology : October 6-8, 2008, Tallinn, Estonia2008 / p. 207-210 : ill

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74

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High-level decision diagrams based coverage metrics for verification and testJenihhin, Maksim; Raik, Jaan; Tšepurov, Anton; Reinsalu, Uljana; Ubar, Raimund-JohannesLATW 2009 : 10th IEEE Latin American Test Workshop : Buzios, Rio de Janero, Brazil, March 2-5, 20092009 / [6] p. : ill http://dx.doi.org/10.1109/LATW.2009.4813792

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75

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High-level modeling and testing of multiple control faults in digital systemsJasnetski, Artjom; Oyeniran, Adeboye Stephen; Tšertov, Anton; Schölzel, Mario; Ubar, Raimund-JohannesFormal proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 20-22, 2016, Košice, Slovakia2016 / [6] p. : ill http://dx.doi.org/10.1109/DDECS.2016.7482445

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