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1
journal article EST
/
journal article ENG
Fast identification of true critical paths in sequential circuits
Ubar, Raimund-Johannes
;
Kostin, Sergei
;
Jenihhin, Maksim
;
Raik, Jaan
;
Jürimägi, Lembit
Microelectronics reliability
2018
/
p. 252-261 : ill
https://doi.org/10.1016/j.microrel.2017.11.027
Journal metrics at Scopus
Article at Scopus
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Article at WOS
journal article EST
/
journal article ENG
2
book article
Hierarchical timing-critical paths analysis in sequential circuits
Jürimägi, Lembit
;
Ubar, Raimund-Johannes
;
Jenihhin, Maksim
;
Raik, Jaan
;
Devadze, Sergei
;
Kostin, Sergei
2018 IEEE 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2018) : 2 – 4 July 2018, Spain
2018
/
6 p. : ill
https://doi.org/10.1109/PATMOS.2018.8464176
book article
3
book article
A scalable technique to identify true critical paths in sequential circuits
Ubar, Raimund-Johannes
;
Kostin, Sergei
;
Jenihhin, Maksim
;
Raik, Jaan
Proceedings 2017 IEEE 20th International Symposium on Design and Diagnotics of Electronic Circuit & Systems(DDECS) : April 19-21, 2017, Dresden, Germany
2017
/
p. 152-157 : ill
https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7934553
book article
Number of records 3, displaying
1 - 3
keyword
152
1.
gate-level analysis
2.
gate-level circuit abstraction
3.
gate-level netlist
4.
register transfer and gate level simulation
5.
hierarchical two-level analysis
6.
system-level analysis
7.
logic level and high level BDDs
8.
Field Programmable Gate Array (FPGA)
9.
field programmable gate arrays
10.
field-programmable gate array
11.
Field-Programmable Gate Array (FPGA)
12.
field-programmable gate arrays
13.
field-programmable gate arrays (FPGA)
14.
FPGA (field-programmable gate array)
15.
GaTe
16.
gate and register transfer levels
17.
gate delay
18.
gate driver
19.
Gate Injection Transistor (GIT)
20.
Golden gate assembly
21.
insulated gate bipolar transistors
22.
insulated gate-commutated thyristors
23.
NBTI-critical gate
24.
Opal Kelly field programmable gate array (FPGA)
25.
absolute sea level
26.
airport level of service
27.
arousal level
28.
assurance level
29.
behaviour level test generation
30.
bi-level optimization
31.
CO2 level in classrooms
32.
CO2 level in classrooms and kindergartens
33.
confidence level
34.
country-level logistics
35.
Cross-level Modeling of Faults in Digital Systems
36.
customer compatibility level
37.
deep level
38.
deep level traps
39.
determination of the CO2 level
40.
determining the level of creatine
41.
digitalisation level
42.
distribution-level phasor measurement units (D-PMUs)
43.
education level
44.
exposure level
45.
extreme penetration level of non synchronous generation
46.
extreme water level
47.
graduate level
48.
Hierarchical Multi-level Test Generation
49.
high level DD (HLDD)
50.
high level synthesis
51.
high-level control fault model
52.
high-level control faults
53.
high-level decision diagram
54.
high-level decision diagrams
55.
high-level decision diagrams (HLDD) synthesis
56.
High-level Decision Diagrams for Modeling Digital Systems
57.
high-level expert group on AI
58.
high-level fault coverage
59.
high-level fault model
60.
high-level fault simulation
61.
high-level functional fault model
62.
high-level synthesis
63.
High-Level Synthesis (HLS)
64.
high-level synthesis for test
65.
high-level test data generation
66.
improvement of safety level at enterprises
67.
improvement of safety level at SMEs
68.
level control
69.
level crossing
70.
level set
71.
level(s) methodology
72.
level-crossing ADC
73.
level-crossing analog-to-digital converters
74.
level-crossing analogue-to-digital converters (ADC)
75.
logic level
76.
lower trophic level models
77.
low-level control system transportation
78.
low-level fault redundancy
79.
low-level radiation
80.
Low-level RF EMF
81.
macro-level industry influences
82.
mean sea level
83.
module level power electronics (MLPE)
84.
module-level power electronics (MLPE)
85.
multi-level governance
86.
multi-level inverter
87.
multi-level modeling
88.
multi-level perspective
89.
multi-level perspective of sustainability transitions
90.
multi-level selection and processing environment
91.
operational level (OL)
92.
Price level
93.
Process/Product Sigma Performance Level (PSPL)
94.
PV module level power electronics
95.
Register Transfer Level - RTL
96.
register transfer level modeling decision diagams
97.
register-transfer level
98.
relative sea level
99.
relative sea level changes
100.
relative sea-level change
101.
RH level
102.
school-level policies
103.
sea level
104.
sea level forecasting
105.
sea level rise
106.
sea level series
107.
sea level trend
108.
sea level: variations and mean
109.
sea-level
110.
sea-level changes
111.
sea-level equation
112.
Sea-level indicator
113.
sea-level prediction
114.
sea-level rise
115.
sea-level trend
116.
service-level agreements
117.
seven-level multilevel
118.
Sigma performance level
119.
skin conductance level
120.
software level TMR
121.
steel-level bureaucracy
122.
strategic level decision makers
123.
system level
124.
system level hazards
125.
system level test
126.
system planning level
127.
system-level evaluation
128.
task-level uninterrupted presence
129.
three-level
130.
three-level converter
131.
three-level inverter
132.
three-level neutral-point-clamped inverter
133.
three-level NPC inverter
134.
three-level T-type
135.
three-level T-type inverter
136.
three-level T-type quasi-impedance-source inverter (3L-T-type qZSI)
137.
three-level voltage inverter
138.
Tool Confidence Level
139.
top-level domain
140.
transaction-level modeling
141.
treatment level
142.
two-level inverter
143.
undergraduate level
144.
university level informatics education
145.
water level
146.
water level fluctuation
147.
water level measurements
148.
water level reconstruction
149.
water-level changes
150.
voltage level
151.
voltage level optimisation
152.
3-level T-type inverter
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