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Jenihhin, Maksim (TTÜ author)
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126
book article
QoSinNoC: analysis of QoS-aware NoC architectures for mixed-criticality applications
Avramenko, Serhiy
;
Azad, Siavoosh Payandeh
;
Niazmand, Behrad
;
Raik, Jaan
;
Jenihhin, Maksim
21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems : DDECS 2018 : Budapest, Hungary 25-27 April, 2018 : proceedings
2018
/
p. 67-72 : ill
https://doi.org/10.1109/DDECS.2018.00-10
book article
127
book article
Rejuvenation of nanoscale logic at NBTI-critical paths using evolutionary TPG
Palermo, N.
;
Tihhomirov, Valentin
;
Copetti, Thiago
;
Jenihhin, Maksim
;
Raik, Jaan
;
Kostin, Sergei
2015 16th Latin American Test Symposium (LATS 2015) : Puerto Vallarta, Mexico, 25-27 March 2015
2015
/
[6] p. : ill
http://dx.doi.org/10.1109/LATW.2015.7102405
book article
128
book article
Rejuvenation of NBTI-impacted processors using evolutionary generation of assembler programs
Pellerey, Francesco
;
Jenihhin, Maksim
;
Squillero, Giovanni
;
Raik, Jaan
;
Sonza Reorda, Matteo
;
Tihhomirov, Valentin
;
Ubar, Raimund-Johannes
2016 IEEE 25th Asian Test Symposium : 21-24 November 2016, Hiroshima, Japan
2016
/
p. 304-309 : ill
https://doi.org/10.1109/ATS.2016.57
book article
129
book article
Reliability continuum and academic EDA
Jenihhin, Maksim
2nd International Training School on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN ISTS 2015) : Prague, Czech Republic, July 13-15, 2015
2015
/
[1] p
book article
130
book article
Representing gate-level SET faults by multiple SEU faults on RT-level
Bagbaba, Ahmet Cagri
;
Jenihhin, Maksim
;
Ubar, Raimund-Johannes
;
Sauer, Christian
2020 IEEE 26th International Symposium on On-Line Testing and Robust System Design (IOLTS), 13-15 July 2020 : proceedings
2020
/
art. 19889351, 6 p. : ill
https://doi.org/10.1109/IOLTS50870.2020.9159715
book article
Seotud publikatsioonid
1
Methods to optimize functional safety assessment for automotive integrated circuits = Meetodid autotööstuse kiipide funktsionaalse ohutuse hindamise optimeerimiseks
131
book article
RESCUE : cross-sectoral PhD training concept for interdependent reliability, security and quality
Vierhaus, Heinrich Theodor
;
Jenihhin, Maksim
;
Sonza Reorda, Matteo
2018 12th European Workshop on Microelectronics Education (EWME) : September 24–26, 2018
2018
/
p. 45-50 : ill
https://doi.org/10.1109/EWME.2018.8629465
book article
132
book article
A rescue demonstrator for interdependent aspects of reliability, security and quality towards a complete EDA flow
Raik, Jaan
;
Jenihhin, Maksim
Proceedings of the 2020 Design, Automation & Test in Europe Conference &Exhibition (DATE 2020), 9 to 13 March, 2020, Grenoble, France
2020
/
p. 58
https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=9116424
book article
133
book article
RESCUE EDA Toolset for interdependent aspects of reliability, security and quality in nanoelectronic systems design
Gürsoy, Cemil Cem
;
Cardoso Medeiros, Guilherme
;
Chen, Juanho
;
Balakrishnan, Aneesh
;
Lai, Xinhui
;
Bagbaba, Ahmet Cagri
;
Raik, Jaan
;
Jenihhin, Maksim
DATE 2019
2019
/
1 p. : ill
https://doi.org/10.5281/zenodo.3362529
https://past.date-conference.com/
book article
134
book article
RESCUE: interdependent challenges of reliability, security and quality in nanoelectronic systems
Jenihhin, Maksim
;
Raik, Jaan
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 9-13 March 2020, Grenoble, France : proceedings
2020
/
art. 19690741 , 6 p
https://doi.org/10.23919/DATE48585.2020.9116558
book article
135
book article
Sequential circuits BIST synthesis from signal specifications
Raik, Jaan
;
Jenihhin, Maksim
;
Adelbert, Rain
Proceedings 23rd NORCHIP Conference : Oulu, Finland, 21-22 November 2005
2005
/
p. 196-199 : ill
book article
136
dissertation
Simulation-based hardware verification with high-level decision diagrams = Simuleerimisel põhinev riistvara verifitseerimine kõrgtaseme otsustusdiagrammidel
Jenihhin, Maksim
2008
https://www.ester.ee/record=b2431332*est
dissertation
137
book article
Simulation-based verification with APRICOT framework using high-level decision diagrams
Jenihhin, Maksim
;
Raik, Jaan
;
Tšepurov, Anton
;
Ubar, Raimund-Johannes
East-West Design & Test Symposium : Moscow, September 18-21, 2009
2009
/
p. 13-16 : ill
book article
138
book article
Software-based mitigation for memory address decoder aging
Kraak, D. H. P.
;
Gürsoy, Cemil Cem
;
Jenihhin, Maksim
;
Raik, Jaan
LATS 2019 : 20th IEEE Latin American Test Symposium : Santiago, Chile, March 11th - 13th 2019
2019
/
6 p. : ill
https://doi.org/10.1109/LATW.2019.8704595
book article
139
book article
Software-level TMR approach for on-board data processing in space applications
Janson, Karl
;
Treudler, Carl Johann
;
Hollstein, Thomas
;
Raik, Jaan
;
Jenihhin, Maksim
;
Fey, Goerschwin
21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems : DDECS 2018 : Budapest, Hungary 25-27 April, 2018 : proceedings
2018
/
p. 147-152 : ill
https://doi.org/10.1109/DDECS.2018.00033
book article
140
book article EST
/
book article ENG
Special session : AutoSoC - a suite of open-source automotive SoC benchmarks
Silva, Felipe Augusto da
;
Bagbaba, Ahmet Cagri
;
Ruospo, Annachiara
;
Jenihhin, Maksim
2020 IEEE 38th VLSI TEST SYMPOSIUM (VTS) - VTS 2020 : proceedings
2020
/
9 p. : ill
https://doi.org/10.1109/VTS48691.2020.9107599
Conference Proceedings at Scopus
Article at Scopus
Article at WOS
book article EST
/
book article ENG
Seotud publikatsioonid
1
Methods to optimize functional safety assessment for automotive integrated circuits = Meetodid autotööstuse kiipide funktsionaalse ohutuse hindamise optimeerimiseks
141
book article
SPICE-inspired fast gate-level computation of NBTI-induced delays in nanoscale logic
Kostin, Sergei
;
Raik, Jaan
;
Ubar, Raimund-Johannes
;
Jenihhin, Maksim
2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems DDECS 2015 : 22-24 April 2015, Belgrade, Serbia : proceedings
2015
/
p. 223-228 : ill
book article
142
journal article EST
/
journal article ENG
A survey on UAV computing platforms : a hardware reliability perspective
Ahmed, Foisal
;
Jenihhin, Maksim
Sensors
2022
/
art. 6286
https://doi.org/10.3390/s22166286
Journal metrics at Scopus
Article at Scopus
Journal metrics at WOS
Article at WOS
journal article EST
/
journal article ENG
143
dissertation
A synthetic, hierarchical approach for modelling and managing complex systems' quality and reliability = Sünteetiline, hierarhiline lähenemine keerukate süsteemide kvaliteedi ja töökindluse modelleerimiseks ja haldamiseks
Balakrishnan, Aneesh
2022
https://doi.org/10.23658/taltech.11/2022
https://digikogu.taltech.ee/et/Item/a594d3ec-0e6b-4a78-819a-fe1f47992612
dissertation
Seotud publikatsioonid
9
Modeling gate-level abstraction hierarchy using graph convolutional neural networks to predict functional de-rating factors
On the estimation of complex circuits functional failure rate by machine learning techniques
Challenges of reliability assessment and enhancement in autonomous systems
The validation of graph model-based, gate level low-dimensional feature data for machine learning applications
Enabling cross-layer reliability and functional safety assessment through ML-based compact models
Understanding multidimensional verification : where functional meets non-functional
Composing graph theory and deep neural networks to evaluate SEU type soft error effects
Gate-level graph representation learning : a step towards the improved stuck-at faults analysis
Modeling soft-error reliability under variability
144
book article
SystemC-based loose models : RTL abstraction for design understanding
Abrar, Syed Saif
;
Jenihhin, Maksim
;
Raik, Jaan
Workshop on Design Automation for Understanding Hardware Designs DUHDe 2015 : Grenoble, March 13, 2015
2015
/
p. 1-6
book article
145
book article
SystemC-based loose models for simulation speed-up by abstraction of RTL IP cores
Abrar, Syed Saif
;
Jenihhin, Maksim
;
Raik, Jaan
2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems DDECS 2015 : 22-24 April 2015, Belgrade, Serbia : proceedings
2015
/
p. 71-74 : ill
http://dx.doi.org/10.1109/DDECS.2015.39
book article
146
book article
zamiaCAD : open source platform for advanced hardware design
Tšepurov, Anton
;
Jenihhin, Maksim
;
Raik, Jaan
DATE 2011 University Booth : Design Automation and Test in Europe : Grenoble, France, March 14-18, 2011
2011
/
[2] p.: ill
book article
147
book article
zamiaCAD : shall we dance?
Jenihhin, Maksim
Open Source Tools for Verification : DVClub 14 January 2013
2013
/
1 p
book article
148
book article
zamiaCAD : understand, develop and debug hardware designs
Jenihhin, Maksim
;
Tihhomirov, Valentin
;
Saif Abrar, Syed
;
Raik, Jaan
;
Bartsch, Günter
DUHDe : 1st Workshop on Design Automation for Understanding Hardware Designs : March 28, 2014 : Friday Workshop at DATE 2014, Dresden, Germany
2014
/
p. 1-6
book article
149
book article
Temporally extended high-level decision diagrams for PSL assertions simulation
Jenihhin, Maksim
;
Raik, Jaan
;
Tšepurov, Anton
;
Ubar, Raimund-Johannes
Proceedings : Thirteenth IEEE European Test Symposium : ETS 2008 : 25-29 May 2008, Verbania, Italy
2008
/
p. 61-68 : ill
book article
150
book article
Test time minimization for hybrid BIST of core-based systems
Jervan, Gert
;
Eles, Petru
;
Peng, Zebo
;
Ubar, Raimund-Johannes
;
Jenihhin, Maksim
12th Asian Test Symposium (ATS 2003) : 17-19 November 2003, Xian, China
2003
/
p. 318-325 : ill
book article
Number of records 165, displaying
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15
1.
Jenihhin, Maksim
2.
Andrijaškin, Maksim
3.
Antonov, Maksim
4.
Butsenko, Maksim
5.
Gorev, Maksim
6.
Maksim, Antonov
7.
Maksim, I.
8.
Maksim, Tiit
9.
Mõttus, Maksim
10.
Ošeka, Maksim
11.
Radzvilovits, Maksim
12.
Ruchkin, Maksim
13.
Saat, Maksim
14.
Säkki, Maksim
15.
Zelenski, Maksim
CV
9
1.
Jenihhin, Maksim 1981
2.
Antonov, Maksim 1978
3.
Butsenko, Maksim
4.
Gazizov, Maksim 1918
5.
Oseka, Maksim
6.
Osheka, Maksim
7.
Ošeka, Maksim 1988
8.
Saat, Maksim 1944
9.
Säkki, Maksim 1977
name of the person
6
1.
Jenihhin, Maksim
2.
Antonov, Maksim
3.
Butsenko, Maksim
4.
Gorev, Maksim
5.
Gorki, Maksim, pseud., 1868-1936
6.
Saat, Maksim
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