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book article

Efficient fault injection based on dynamic HDL slicing techniqueBagbaba, Ahmet Cagri; Jenihhin, Maksim; Raik, Jaan; Sauer, Christian2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS 2019) : 1-3 July 2019, Greece2019 / p. 52-53 : ill https://doi.org/10.1109/IOLTS.2019.8854419

book article

Seotud publikatsioonid 1

Methods to optimize functional safety assessment for automotive integrated circuits = Meetodid autotööstuse kiipide funktsionaalse ohutuse hindamise optimeerimiseks

52

book article

E-learning environment for WEB-based study of testingUbar, Raimund-Johannes; Jutman, Artur; Raik, Jaan; Devadze, Sergei; Jenihhin, Maksim; Aleksejev, Igor; Tšepurov, Anton; Tšertov, Anton; Kostin, Sergei; Orasson, Elmet; Wuttke, Heinz-DietrichProceedings of the 8th European Workshop on Microelectronics Education : EWME 2010 : Darmstadt, Germany, 10-12 May 20102010 / p. 47-52 : ill

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53

book article EST / book article ENG

Energy-efficient multi-fragment Markov model guided online model-based testing for MPSoCVain, Jüri; Tsiopoulos, Leonidas; Kharchenko, Vyacheslav; Apneet Kaur; Jenihhin, Maksim; Raik, Jaan; Nõmm, SvenGreen IT Engineering: Social, Business and Industrial Applications2019 / p. 273-297 https://doi.org/10.1007/978-3-030-00253-4_12 Article collection at Scopus Article at Scopus

book article EST / book article ENG

54

book article

Estonia : e-Design and EDAJenihhin, Maksim50th DAC Global Forum2013 / [2] p

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55

book article

Extensible open-source framework for translating RTL VHDL IP cores to SystemCSaif Abrar, Syed; Jenihhin, Maksim; Raik, JaanProceedings of the 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) : April 8-10, 2013, Karlovy Vary, Czech Republic2013 / p. 112-115

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56

journal article EST / journal article ENG

Fast and fair computation offloading management in a swarm of drones using a rating-based federated learning approachRahbari, Dadmehr; Alam, Muhammad Mahtab; Le Moullec, Yannick; Jenihhin, MaksimIEEE Access2021 / p. 113832-113849 https://doi.org/10.1109/ACCESS.2021.3104117 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

57

journal article EST / journal article ENG

Fast identification of true critical paths in sequential circuitsUbar, Raimund-Johannes; Kostin, Sergei; Jenihhin, Maksim; Raik, Jaan; Jürimägi, LembitMicroelectronics reliability2018 / p. 252-261 : ill https://doi.org/10.1016/j.microrel.2017.11.027 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

58

book article

FP7 DIAMOND : design error diagnosis and correction success storiesRaik, Jaan; Jenihhin, Maksim; Könighofer, RobertEuropean Test Symposium (ETS), 2013, Avignon, France2013 / p. 1-6

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59

book article

FPGA-based implementation of EEG analyzerGorev, Maksim; Pesonen, Vadim; Mihhailov, Dmitri; Jenihhin, Maksim; Ellervee, PeeterDATE'11 Friday Workshop on "Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing" : Grenoble, France, March 20112011 / [1] p https://www.microsoft.com/en-us/research/wp-content/uploads/2017/03/ellervee.pdf

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60

book article

FSMD RTL design manipulation for clock interface abstractionAbrar, Syed Saif; Jenihhin, Maksim; Raik, Jaan2015 International Conference on Advances in Computing, Communications and Informatics (ICACCI) : 10-13 August 2015, Kerala, India2015 / p. 463-468 : ill http://dx.doi.org/10.1109/ICACCI.2015.7275652

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61

book article

Gate-level graph representation learning : a step towards the improved stuck-at faults analysisBalakrishnan, Aneesh; Alexandrescu, Dan; Jenihhin, Maksim; Lange, Thomas; Glorieux, MaximilienProceedings of the Twenty Second International Symposium on Quality Electronic Design (ISQED) : Santa Clara, USA, 7-9 April 20212021 / p. 24-30 https://doi.org/10.1109/ISQED51717.2021.9424256

book article

Seotud publikatsioonid 1

A synthetic, hierarchical approach for modelling and managing complex systems' quality and reliability = Sünteetiline, hierarhiline lähenemine keerukate süsteemide kvaliteedi ja töökindluse modelleerimiseks ja haldamiseks

62

book article

Gate-level modelling of NBTI-induced delays under process variationsCopetti, Thiago; Cardoso Medeiros, Guilherme; Bolzani Poehls, Leticia; Vargas, Fabian; Kostin, Sergei; Jenihhin, Maksim; Raik, Jaan; Ubar, Raimund-JohannesLATS 2016 : 17th IEEE Latin-American Test Symposium, Foz do Iguacu, Brazil, 6th-9th April 20162016 / p. 75-80 : ill http://dx.doi.org/10.1109/LATW.2016.7483343

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63

book article

Generating directed tests for C programs using RTL ATPGRaik, Jaan; Drenkhan, Tiia; Jenihhin, Maksim; Viilukas, Taavi; Karputkin, Anton; Tšepurov, Anton; Ubar, Raimund-JohannesProceedings of the IEEE 13th Workshop on RTL and High Level Testing (WRTLT'12)2012 / p. 1-6

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64

dissertation

Hardware modeling for design verification and debug = Riistvara modelleerimine disaini verifitseerimise ja silumise jaoksTšepurov, Anton2013 https://www.ester.ee/record=b2963501*est

dissertation

65

book article

Hierarchical analysis of short defects between metal lines in CMOS ICPleskacz, Witold A.; Jenihhin, Maksim; Raik, Jaan; Rakowski, Michal; Ubar, Raimund-Johannes; Kuzmicz, WieslawProceedings : 11th EUROMICRO Conference on Digital System Design : Architectures, Methods and Tools : (DSD 2008) : September 3-5, 2008, Parma, Italy2008 / p. 729-734 : ill https://ieeexplore.ieee.org/document/4669309

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66

book article

Hierarchical calculation of malicious faults for evaluating the fault-toleranceUbar, Raimund-Johannes; Devadze, Sergei; Jenihhin, Maksim; Raik, Jaan; Jervan, Gert; Ellervee, PeeterProceedings : Fourth IEEE International Symposium on Electronic Design, Test and Applications : [DELTA 2008] : 23-25 January 2008, Hong Kong, SAR, China2008 / p. 222-227 : ill https://ieeexplore.ieee.org/document/4459544

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67

book article

Hierarchical identification of NBTI-critical gates in nanoscale logicKostin, Sergei; Raik, Jaan; Ubar, Raimund-Johannes; Jenihhin, MaksimLATW2014 : 15th IEEE Latin-American Test Workshop : Fortaleza, Brazil, March 12th-15th, 20142014 / [6] p. : ill

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68

book article

Hierarchical timing-critical paths analysis in sequential circuitsJürimägi, Lembit; Ubar, Raimund-Johannes; Jenihhin, Maksim; Raik, Jaan; Devadze, Sergei; Kostin, Sergei2018 IEEE 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2018) : 2 – 4 July 2018, Spain2018 / 6 p. : ill https://doi.org/10.1109/PATMOS.2018.8464176

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69

book article

High-Level Combined Deterministic and Pseudo-exhuastive Test Generation for RISC ProcessorsOyeniran, Adeboye Stephen; Ubar, Raimund-Johannes; Jenihhin, Maksim; Raik, Jaan2019 IEEE European Test Symposium (ETS) : ETS 2019, May 27-31, 2019, Baden-Baden, Germany : Proceedings2019 / 6 p. : ill https://doi.org/10.1109/ETS.2019.8791526

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70

book article

High-level combined deterministic and pseudo-exhuastive test generation for RISC processorsOyeniran, Adeboye Stephen; Ubar, Raimund-Johannes; Jenihhin, Maksim; Gürsoy, Cemil Cem; Raik, Jaan2019 IEEE European Test Symposium (ETS) : proceedings2019 / 6 p. : ill https://doi.org/10.1109/ETS.2019.8791526

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71

book article

High-Level Decision Diagram manipulations for code coverage analysisMinakova, Karina; Reinsalu, Uljana; Tšepurov, Anton; Raik, Jaan; Jenihhin, Maksim; Ubar, Raimund-Johannes; Ellervee, PeeterBEC 2008 : 2008 International Biennial Baltic Electronics Conference : proceedings of the 11th Biennial Baltic Electronics Conference : Tallinn University of Technology : October 6-8, 2008, Tallinn, Estonia2008 / p. 207-210 : ill

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72

book article

High-level decision diagram simulation for diagnosis and soft-error analysisRaik, Jaan; Repinski, Urmas; Jenihhin, Maksim; Chepurov, AntonDesign and test technology for dependable systems-on-chip2011 / p. 294-309 : ill https://www.igi-global.com/chapter/high-level-decision-diagram-simulation/51406

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73

book article

High-level decision diagrams based coverage metrics for verification and testJenihhin, Maksim; Raik, Jaan; Tšepurov, Anton; Reinsalu, Uljana; Ubar, Raimund-JohannesLATW 2009 : 10th IEEE Latin American Test Workshop : Buzios, Rio de Janero, Brazil, March 2-5, 20092009 / [6] p. : ill http://dx.doi.org/10.1109/LATW.2009.4813792

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74

book article

High-level design error diagnosis using backtrace on decision diagramsRaik, Jaan; Repinski, Urmas; Ubar, Raimund-Johannes; Jenihhin, Maksim; Tšepurov, Anton28th Norchip Conference : Tampere, Finland, 15-16 November 2010 : conference program and papers2010 / [4] p. : ill http://dx.doi.org/10.1109/NORCHIP.2010.5669486

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75

book article

High-level fault diagnosis in RISC processors with Implementation-Independent Functional TestOyeniran, Adeboye Stephen; Jenihhin, Maksim; Raik, Jaan; Ubar, Raimund-Johannes2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) : Nicosia, Cyprus : 04-06 July 20222022 / p. 32-37 https://doi.org/10.1109/ISVLSI54635.2022.00019

book article

Jenihhin, Maksim (TTÜ author)

types of item

author 14

CV 9

name of the person 7