Fast RTL fault simulation using decision diagrams and bitwise set operations

vastutusandmed
Uljana Reinsalu, Jaan Raik, Raimund Ubar, Peeter Ellervee
allikas
2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) : 3-5 October 2011, Vancouver, Canada
ilmumiskoht
[S.l.]
kirjastus/väljaandja
ilmumisaasta
leheküljed
p. 164-170
konverentsi nimetus, aeg
IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) : 3-5 October 2011
konverentsi toimumispaik
Vancouver, Canada
ISSN
1550-5774
ISBN
978-1-4577-1713-0
märkused
Bibliogr.: 14 ref
keel
inglise
Reinsalu, U., Raik, J., Ubar, R., Ellervee, P. Fast RTL fault simulation using decision diagrams and bitwise set operations // 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) : 3-5 October 2011, Vancouver, Canada. [S.l.] : IEEE, 2011. p. 164-170. https://ieeexplore.ieee.org/document/6104440