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New built-in self-test scheme for SoC interconnectJutman, Artur; Ubar, Raimund-Johannes; Raik, JaanThe 9th World Multi-Conference on Systemics, Cybernetics and Informatics : WMSCI 2005 : July 10-13, 2005, Orlando, Florida, USA. Vol. IV2005 / p. 19-24 : ill https://www.researchgate.net/publication/237375234_New_Built-In_Self-Test_Scheme_for_SoC_Interconnect

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252

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New categories of Safe Faults in a processor-based Embedded SystemGürsoy, Cemil Cem; Jenihhin, Maksim; Oyeniran, Adeboye Stephen; Piumatti, Davide; Raik, Jaan; Sonza Reorda, Matteo; Ubar, Raimund-Johannes2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), Cluj-Napoca, Romania : proceedings2019 / 4 p. : ill https://doi.org/10.1109/DDECS.2019.8724642

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253

journal article EST / journal article ENG

A new resonant fault current limiter for improved wind turbine transient stabilityDemin, Slava; Sitbon, Moshe; Aharon, Ilan; Barbi, Eli; Machlev, Ram; Belikov, Juri; Levron, Yoash; Baimel, DmitryElectric Power Systems Research2023 / art. 109600, 8 p https://doi.org/10.1016/j.epsr.2023.109600 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

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254

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New technique for hierarchical identification of untestable faults in sequential circuitsKrivenko, Anna; Ubar, Raimund-Johannes; Raik, Jaan; Kruus, MargusInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / lk. 155-158 : ill

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255

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NoCDepend : a flexible and scalable dependability technique for 3D networks-on-chipHollstein, Thomas; Azad, Siavoosh Payandeh; Kogge, Thilo; Ying, Haoyuan; Hofmann, Klaus2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems DDECS 2015 : 22-24 April 2015, Belgrade, Serbia : proceedings2015 / p. 75-78 : ill http://dx.doi.org/10.1109/DDECS.2015.30

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256

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Non-intrusive defects identification for the high voltage instrument transformersAsefi, Sajjad; Kilter, Jako; Landsberg, Mart2023 IEEE 17th International Conference on Compatibility, Power Electronics and Power Engineering (CPE-POWERENG)2023 / 5 p https://doi.org/10.1109/CPE-POWERENG58103.2023.10227493

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257

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Novel approaches to electrical machine fault diagnosisVaimann, Toomas; Antonino-Daviu, Jose Alfonso; Rassõlkin, AntonEnergies2023 / art. 5641 https://doi.org/10.3390/en16155641 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

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258

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A novel artificial neural networks based automatic adaptive fault detection technique for analog circuitsPetlenkov, Eduard; Jutman, Artur; Nõmm, Sven; Ubar, Raimund-JohannesBEC 2008 : 2008 International Biennial Baltic Electronics Conference : proceedings of the 11th Biennial Baltic Electronics Conference : Tallinn University of Technology : October 6-8, 2008, Tallinn, Estonia2008 / p. 167-170 : ill

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259

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A novel random approach to diagnostic test generationOsimiry, Emmanuel Ovie; Ubar, Raimund-Johannes; Kostin, Sergei; Raik, Jaan2nd IEEE NORCAS Conference : 1-2 November 2016, Copenhagen, Denmark2016 / [4] p. : ill https://doi.org/10.1109/NORCHIP.2016.7792915

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260

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Numerical study on the structural behavior of intact and damaged box beams under four-point bending loadPutranto, Teguh; Kõrgesaar, MihkelDevelopments in the Collision and Grounding of Ships and Offshore Structures : Proceedings of the 8th International Conference on Collision and Grounding of Ships and Offshore Structures (ICCGS 2019), 21-23 October, 2019, Lisbon, Portugal2019 / p. 139−143 https://www.taylorfrancis.com/books/e/9781003002420/chapters/10.1201/9781003002420-17

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261

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Observer-based residual generation for nonlinear discrete-time systemsKaldmäe, Arvo; Kotta, ÜlleProceedings of the Estonian Academy of Sciences2018 / p. 325-336 http://www.kirj.ee/public/proceedings_pdf/2018/issue_4/proc-2018-4-325-336.pdf https://doi.org/10.3176/proc.2018.4.01 https://artiklid.elnet.ee/record=b2868167*est Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

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262

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Off-line testing of crosstalk induced glitch faults in NoC InterconnectsBengtsson, Tomas; Kumar, Shashi; Jutman, Artur; Ubar, Raimund-JohannesProceedings [of] 24th IEEE Norchip Conference : Linköping, Sweden, 20-21 November 20062006 / p. 221-225 : ill http://dx.doi.org/10.1109/NORCHP.2006.329215

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263

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On coverage of timing related faults at board levelJutman, Artur; Aleksejev, Igor; Devadze, Sergei2016 21st IEEE European Test Symposium (ETS) : May 23rd-26th 2016, Amsterdam, The Netherlands : proceedings2016 / [2] p. : ill https://doi.org/10.1109/ETS.2016.7519295

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264

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On efficient logic-level simulation of digital circuits represented by the SSBDD modelJutman, Artur; Raik, Jaan; Ubar, Raimund-Johannes23rd International Conference on Microelectronics : MIEL 2002, Niš, Yugoslavia, 12-15 May 2002 : proceedings. Volume 22002 / p. 621-624 : ill https://ieeexplore.ieee.org/document/1003334

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265

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On NBTI-induced aging analysis in IEEE 1687 reconfigurable scan networksDamljanovic, Aleksa; Squillero, Giovanni; Gürsoy, Cemil Cem; Jenihhin, MaksimVLSI-SoC 2019 : 27th IFIP/IEEE International Conference on Very Large Scale Integration : [proceedings]2019 / p. 335-340 : ill https://doi.org/10.1109/VLSI-SoC.2019.8920313

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266

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On the estimation of complex circuits functional failure rate by machine learning techniquesLange, Thomas; Balakrishnan, Aneesh; Glorieux, Maximilien; Alexandrescu, Dan; Sterpone, Luca49th Annual IEEE/IFIP International Conference on Dependable Systems and Networks - DSN 2019 : Supplemental Volume : proceedings2019 / p. 35-41 : ill https://doi.org/10.1109/DSN-S.2019.00021

book article

Seotud publikatsioonid 1

A synthetic, hierarchical approach for modelling and managing complex systems' quality and reliability = Sünteetiline, hierarhiline lähenemine keerukate süsteemide kvaliteedi ja töökindluse modelleerimiseks ja haldamiseks

267

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On-chip sensors data collection and analysis for SoC health managementShibin, Konstantin; Jenihhin, Maksim; Jutman, Artur; Devadze, Sergei; Tsertov, Anton2023 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)2023 / 6 p https://doi.org/10.1109/DFT59622.2023.10313562

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268

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On-line fault classification and handling in IEEE1687 based fault management system for complex SoCsShibin, Konstantin; Devadze, Sergei; Jutman, ArturLATS 2016 : 17th IEEE Latin-American Test Symposium, Foz do Iguacu, Brazil, 6th-9th April 20162016 / p. 69-74 : ill https://doi.org/10.1109/LATW.2016.7483342

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269

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Operation of Single-Chip MOSFET and IGBT Devices after failure due to repetitive avalanche [Electronic resource]Blinov, Andrei; Norrga, Staffan; Tibola, GabrielEPE'15 ECCE Europe : 8-10 September 2015, Geneva, Switzerland : 17th European Conference on Power Electronics and Applications2015 / p. 1-9 : ill. [USB] http://dx.doi.org/10.1109/EPE.2015.7309190

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270

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Optimization of memory-constrained hybrid BIST for testing core-based systemsJervan, Gert; Kruus, Helena; Orasson, Elmet; Ubar, Raimund-JohannesProceedings of the IEEE 2nd International Symposium on Industrial Embedded Systems : SIES'2007 : Lisbon, Portugal, 4-6 July 20072007 / p. 71-77 https://ieeexplore.ieee.org/document/4297319

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271

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Overview of e-learning environment for web-based study of testing and diagnostics of digital systemsJutman, Artur; Ubar, Raimund-Johannes; Wuttke, Heinz-DietrichMicroelectronics education : proceedings of the 5th European Workshop on Microelectronics Education, held in Lausanne, Switzerland, April 15-16, 20042004 / p. 253-258 : ill https://link.springer.com/chapter/10.1007/978-1-4020-2651-5_41

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272

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Overview of e-learning environment for web-based study of testing and diagnostics of digital systemsJutman, Artur; Ubar, Raimund-Johannes; Wuttke, Heinz-Dietrich5th European Workshop on Microelectronics Education - EWME 2004, Lausanne, 20042004 / p. 173-176 https://link.springer.com/chapter/10.1007/978-1-4020-2651-5_41

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273

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Parallel critical path tracing fault simulationUbar, Raimund-Johannes39. Internationales Wissenschaftliches Kolloquium : 27.-30.09.1994. Bd. 1, Vortragsreihen1994 / S. 399-404

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274

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Parallel critical path tracing fault simulation in sequential circuitsKõusaar, Jaak; Ubar, Raimund-Johannes; Kostin, Sergei; Devadze, Sergei; Raik, JaanProceedings of 25th International Conference MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS : MIXDES 2018 : Gdynia, Poland, June 21–23, 20182018 / p. 305-310 : ill https://doi.org/10.23919/MIXDES.2018.8436880

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275

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Parallel exact critical path tracing fault simulation with reduced memory requirementsDevadze, Sergei; Ubar, Raimund-Johannes; Raik, Jaan; Jutman, Artur4th International Conference on Design and Technology of Integrated Systems in Nanoscal Era : DTIS'09 : Cairo, Egypt, April 6-9, 20092009 / p. 155-160 : ill https://ieeexplore.ieee.org/document/4938046

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