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Jenihhin, Maksim (author)
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151
book article
zamiaCAD : shall we dance?
Jenihhin, Maksim
Open Source Tools for Verification : DVClub 14 January 2013
2013
/
1 p
book article
152
book article
zamiaCAD : understand, develop and debug hardware designs
Jenihhin, Maksim
;
Tihhomirov, Valentin
;
Saif Abrar, Syed
;
Raik, Jaan
;
Bartsch, Günter
DUHDe : 1st Workshop on Design Automation for Understanding Hardware Designs : March 28, 2014 : Friday Workshop at DATE 2014, Dresden, Germany
2014
/
p. 1-6
book article
153
book article
Temporally extended high-level decision diagrams for PSL assertions simulation
Jenihhin, Maksim
;
Raik, Jaan
;
Tšepurov, Anton
;
Ubar, Raimund-Johannes
Proceedings : Thirteenth IEEE European Test Symposium : ETS 2008 : 25-29 May 2008, Verbania, Italy
2008
/
p. 61-68 : ill
https://ieeexplore.ieee.org/document/4556029
book article
154
book article
Test time minimization for hybrid BIST of core-based systems
Jervan, Gert
;
Eles, Petru
;
Peng, Zebo
;
Ubar, Raimund-Johannes
;
Jenihhin, Maksim
12th Asian Test Symposium (ATS 2003) : 17-19 November 2003, Xian, China
2003
/
p. 318-325 : ill
https://link.springer.com/article/10.1007/s11390-006-0907-x
book article
155
journal article
Test time minimization for hybrid BIST of core-based systems
Jervan, Gert
;
Eles, Petru
;
Peng, Zebo
;
Ubar, Raimund-Johannes
;
Jenihhin, Maksim
Journal of computer science and technology
2006
/
6, p. 907-912 : ill
https://link.springer.com/article/10.1007/s11390-006-0907-x
journal article
156
book article
Test time minimization for hybrid BIST with test pattern broadcasting
Ubar, Raimund-Johannes
;
Jenihhin, Maksim
;
Jervan, Gert
;
Peng, Zebo
IEEE NORCHIP 2003 : 21 Norchip Conference : Riga, Latvia, 10-11 November 2003 : proceedings
2003
/
p. 112-116 : ill
https://www.ida.liu.se/labs/eslab/publications/pap/db/norchip03.pdf
book article
157
book article
The validation of graph model-based, gate level low-dimensional feature data for machine learning applications
Balakrishnan, Aneesh
;
Lange, Thomas
;
Glorieux, Maximilien
;
Alexandrescu, Dan
;
Jenihhin, Maksim
2019 IEEE Nordic Circuits and Systems Conference (NORCAS) : NORCHIP and International Symposium of System-on-Chip (SoC), 29-30 October 2019, Helsinki, Finland : proceedings in IEEE Xplore
2019
/
7 p
https://doi.org/10.1109/NORCHIP.2019.8906974
book article
Seotud publikatsioonid
1
A synthetic, hierarchical approach for modelling and managing complex systems' quality and reliability = Sünteetiline, hierarhiline lähenemine keerukate süsteemide kvaliteedi ja töökindluse modelleerimiseks ja haldamiseks
158
book article
Timing-critical path analysis with structurally synthesized BDDs
Ubar, Raimund-Johannes
;
Jürimägi, Lembit
;
Jenihhin, Maksim
;
Raik, Jaan
;
Olugbenga, Niyi-Leigh
;
Viies, Vladimir
2018 7th Mediterranean Conference on Embedded Computing (MECO)
2018
/
6 p. : ill
https://doi.org/10.1109/MECO.2018.8406051
book article
159
book article
Towards multidimensional verification : where functional meets non-functional
Jenihhin, Maksim
;
Lai, Xinhui
;
Ghasempouri, Tara
;
Raik, Jaan
2018 IEEE Nordic Circuits and Systems Conference (NORCAS) : NORCHIP and International Symposium of System-on-Chip (SoC) : 30-31 October 2018, Tallinn, Estonia : proceedings in IEEE Xplore
2018
/
7 p. : ill
https://doi.org/10.1109/NORCHIP.2018.8573495
book article
Seotud publikatsioonid
1
Approaches to extra-functional verification of security and reliability aspects in hardware designs = Riistvaraprojektide turva- ja töökindlusaspektide ekstrafunktsionaalse verifitseerimise lähenemisviisid
160
book article
True path tracing in structurally synthesized BDDs for testability analysis of digital circuits
Ubar, Raimund-Johannes
;
Jürimägi, Lembit
;
Oyeniran, Adeboye Stephen
;
Jenihhin, Maksim
Euromicro Conference on Digital System Design : DSD 2019 : 28 - 30 August 2019 Kallithea, Chalkidiki, Greece : proceedings
2019
/
p. 492-499 : ill
https://doi.org/10.1109/DSD.2019.00077
book article
161
book article
TTBist: a DfT tool for enhancing functional test for SoC
Hermann, K.
;
Raik, Jaan
;
Jenihhin, Maksim
BEC 2006 : 2006 International Baltic Electronics Conference : Tallinn University of Technology, October 2-4, 2006, Tallinn, Estonia : proceedings of the 10th Biennial Baltic Electronics Conference
2006
/
p. 191-194 : ill
book article
162
book
2018 IEEE Nordic Circuits and Systems Conference (NORCAS) : NORCHIP and International Symposium of System-on-Chip (SoC) : 30-31 October 2018, Tallinn, Estonia : proceedings in IEEE Xplore [Online resource]
2018
https://ieeexplore.ieee.org/xpl/conhome/8552599/proceeding
book
163
newspaper article
Töökindla arvutusriistvara keskuse juht Maksim Jenihhin
Jenihhin, Maksim
forte.delfi.ee
2024
Töökindla arvutusriistvara keskuse juht Maksim Jenihhin
newspaper article
164
journal article
Tööstusdoktorantuur projektis RESCUE
Jenihhin, Maksim
Mente et Manu
2017
/
lk. 21
http://www.ester.ee/record=b1242496*est
journal article
165
journal article EST
/
journal article ENG
Understanding fault-tolerance vulnerabilities in advanced SoC FPGAs for critical applications
Cherezova, Natalia
;
Shibin, Konstantin
;
Jenihhin, Maksim
;
Jutman, Artur
Microelectronics reliability
2023
/
art. 115010, 10 p. : ill
https://doi.org/10.1016/j.microrel.2023.115010
Journal metrics at Scopus
Article at Scopus
Journal metrics at WOS
Article at WOS
journal article EST
/
journal article ENG
166
journal article EST
/
journal article ENG
Understanding multidimensional verification : where functional meets non-functional
Lai, Xinhui
;
Balakrishnan, Aneesh
;
Lange, Thomas
;
Jenihhin, Maksim
;
Ghasempouri, Tara
;
Raik, Jaan
;
Alexandrescu, Dan
Microprocessors and microsystems
2019
/
art. 102867, 13 p. : ill
https://doi.org/10.1016/j.micpro.2019.102867
Journal metrics at Scopus
Article at Scopus
Journal metrics at WOS
Article at WOS
journal article EST
/
journal article ENG
Seotud publikatsioonid
2
A synthetic, hierarchical approach for modelling and managing complex systems' quality and reliability = Sünteetiline, hierarhiline lähenemine keerukate süsteemide kvaliteedi ja töökindluse modelleerimiseks ja haldamiseks
Approaches to extra-functional verification of security and reliability aspects in hardware designs = Riistvaraprojektide turva- ja töökindlusaspektide ekstrafunktsionaalse verifitseerimise lähenemisviisid
167
book article
Universal mitigation of NBTI-induced aging by design randomization
Jenihhin, Maksim
;
Kamkin, Alexander
;
Navabi, Zainalabedin
;
Sadeghi-Kohan, Somayeh
Proceedings of 2016 IEEE East-West Design & Test Symposium (EWDTS) : Yerevan, Armenia, October 14-17, 2016
2017
/
[5] p. : ill
http://dx.doi.org/10.1109/EWDTS.2016.7807635
book article
168
book article
Unsupervised recycled FPGA detection using symmetry analysis
Tarique, Tanvir Ahmad
;
Ahmed, Foisal
;
Jenihhin, Maksim
;
Ali, Liakot
12th International Conference on Electrical and Computer Engineering : ICECE 2022
2022
/
p. 437-440
https://doi.org/10.1109/ICECE57408.2022.10088856
book article
169
book article
Upgrading QoSinNoC : efficient routing for mixed-criticality applications and power analysis
Avramenko, Serhiy
;
Azad, Siavoosh Payandeh
;
Violante, Massimo
;
Niazmand, Behrad
;
Raik, Jaan
;
Jenihhin, Maksim
Proceedings of the 2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) : October 8-10, 2018, Verona, Italy
2018
/
p. 207-212 : ill
https://doi.org/10.1109/VLSI-SoC.2018.8644866
book article
170
book article
Using simulation statistics for bug localization in RTL designs
Tihhomirov, Valentin
;
Jenihhin, Maksim
;
Raik, Jaan
Info- ja kommunikatsioonitehnoloogia doktorikooli IKTDK seitsmenda aastakonverentsi artiklite kogumik : 15.-16. novembril 2013, Haapsalu
2013
/
p. 107-110 : ill
book article
171
book article
Wafer-level die re-test success prediction using machine learning
Selg, Hardi
;
Jenihhin, Maksim
;
Ellervee, Peeter
21st IEEE Latin-American Test Symposium (LATS) 2020 : proceedings
2020
/
5 p
https://doi.org/10.1109/LATS49555.2020.9093672
book article
172
book article
VHDL design debug framework based on zamiaCAD
Tihhomirov, Valentin
;
Tšepurov, Anton
;
Saif Abrar, Syed
;
Jenihhin, Maksim
;
Raik, Jaan
DATE 2013 : Design Automation and Test in Europe, March 18-22, 2013, Grenoble, France
2013
/
[1] p. : ill
book article
Number of records 172, displaying
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14
1.
Jenihhin, Maksim
2.
Andrijaškin, Maksim
3.
Antonov, Maksim
4.
Butsenko, Maksim
5.
Gorev, Maksim
6.
Maksim, I.
7.
Maksim, Tiit
8.
Mõttus, Maksim
9.
Ošeka, Maksim
10.
Radzvilovits, Maksim
11.
Ruchkin, Maksim
12.
Saat, Maksim
13.
Säkki, Maksim
14.
Zelenski, Maksim
CV
9
1.
Jenihhin, Maksim 1981
2.
Antonov, Maksim 1978
3.
Butsenko, Maksim
4.
Gazizov, Maksim 1918-?
5.
Oseka, Maksim
6.
Osheka, Maksim
7.
Ošeka, Maksim 1988
8.
Saat, Maksim 1944
9.
Säkki, Maksim 1977
name of the person
7
1.
Jenihhin, Maksim
2.
Antonov, Maksim
3.
Butsenko, Maksim
4.
Gorev, Maksim
5.
Gorki, Maksim, pseud., 1868-1936
6.
Ošeka, Maksim
7.
Saat, Maksim
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