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A scalable model based RTL framework zamiaCAD for static analysisTšepurov, Anton; Jenihhin, Maksim; Raik, Jaan; Tihhomirov, Valentin2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC) : October 7-10, 2012 Santa Cruz, USA Dream Inn, Santa Cruz, USA : [proceedings]2012 / p. 171-176 : ill

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Abstraction of clock interface for conversion of RTL VHDL to SystemCSaif Abrar, Syed; Jenihhin, Maksim; Raik, Jaan2014 IEEE International Advance Computing Conference (IACC) : February 21-22, 2014, Gurgaon, India2014 / p. 50-55 : ill

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Accelerating transient fault injection campaigns by using Dynamic HDL SlicingBagbaba, Ahmet Cagri; Jenihhin, Maksim; Raik, Jaan; Sauer, Christian2019 IEEE Nordic Circuits and Systems Conference (NORCAS) : NORCHIP and International Symposium of System-on-Chip (SoC), 29-30 October 2019, Helsinki, Finland : proceedings in IEEE Xplore2019 / 7 p. : ill https://doi.org/10.1109/NORCHIP.2019.8906932

book article

Seotud publikatsioonid 1

Methods to optimize functional safety assessment for automotive integrated circuits = Meetodid autotööstuse kiipide funktsionaalse ohutuse hindamise optimeerimiseks

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Accurate NBTI-induced gate delay modeling based on intensive SPICE simulationsKostin, Sergei; Raik, Jaan; Ubar, Raimund-Johannes; Jenihhin, MaksimMEDIAN Finale : Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale : November 10-11, 2015, Tallinn, Estonia2015 / p. 21-26 : ill

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An Accelerator-based architecture utilizing an efficient memory link for modern computational requirementsYousefzadeh, Saba; Basharkhah, Katayoon; Raik, Jaan; Jenihhin, Maksim2019 IEEE East-West Design & Test Symposium (EWDTS)2019 / 6 p. : ill https://doi.org/10.1109/EWDTS.2019.8884481

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An approach for PSL assertion coverage analysis with high-level decision diagramsJenihhin, Maksim; Raik, Jaan; Ubar, Raimund-Johannes; Shchenova, TatjanaProceedings of IEEE East-West Design & Test Symposium (EWDTS'10) : St. Petersburg, Russia, September 17-20, 20102010 / p. 13-16 : ill https://ieeexplore.ieee.org/document/5742048

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journal article

An approach for verification assertions reuse 2 in RTL test pattern generationJenihhin, Maksim; Raik, Jaan; Ubar, Raimund-Johannes; Viilukas, Taavi; Fujiwara, HideoJournal of Shanghai Normal University : Natural Sciences2010 / p. 441-447 : ill https://www.researchgate.net/publication/240613999_An_Approach_for_Verification_Assertions_Reuse_in_RTL_Test_Pattern_Generation

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An approach for verification assertions reuse in RTL test pattern generationJenihhin, Maksim; Raik, Jaan; Fujiwara, Hideo; Ubar, Raimund-Johannes; Viilukas, TaaviDigest of papers : IEEE 11th Workshop on RTL and High Level Testing : WRTLT'10 : December 5-6, 2010, Shanghai, China2010 / p. 107-110 : ill

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journal article EST / journal article ENG

An optimization framework for dynamic pipeline management in computing systemsNaqvi, Syed Rameez; Zahid, Anjum; Sawalha, Lina; Jenihhin, MaksimComputers & electrical engineering2019 / p. 242-258 : ill https://doi.org/10.1016/j.compeleceng.2019.07.013 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

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Analyzing side-channel attack vulnerabilities at RTLLai, Xinhui; Jenihhin, Maksim2023 IEEE 24th Latin American Test Symposium (LATS)2023 / 2 p. : ill https://doi.org/10.1109/LATS58125.2023.10154497

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journal article

Application of high-level decision diagrams for simulation-based verification tasksJenihhin, Maksim; Raik, Jaan; Tšepurov, Anton; Ubar, Raimund-JohannesEstonian journal of engineering2010 / 1, p. 56-77 : ill

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book article

Application specific true critical paths identification in sequential circuitsJürimägi, Lembit; Ubar, Raimund-Johannes; Jenihhin, Maksim; Raik, Jaan; Devadze, Sergei; Oyeniran, Adeboye Stephen2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS 2019) : 1-3 July 2019, Greece2019 / p. 299-304 : ill https://doi.org/10.1109/IOLTS.2019.8854442

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Applications of the open source HW design framework zamiaCADTšepurov, Anton; Tihhomirov, Valentin; Saif Abrar, Syed; Jenihhin, Maksim; Raik, JaanDATE 2012 University Booth : Design Automation and Test in Europe : Dresden, Germany, March 12-16, 20122012 / 1 p

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Applying RIS-based communication for collaborative computing in a swarm of dronesRahbari, Dadmehr; Alam, Muhammad Mahtab; Le Moullec, Yannick; Jenihhin, MaksimIEEE Access2023 / p. 70093−70109 https://doi.org/10.1109/ACCESS.2023.3293737 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

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APPRAISER : DNN fault resilience analysis employing approximation errorsTaheri, Mahdi; Ahmadilivani, Mohammad Hasan; Jenihhin, Maksim; Raik, Jaan; Daneshtalab, Masoud2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)2023 / p. 124−127 https://ddecs2023.taltech.ee/ https://doi.org//10.1109/DDECS57882.2023.10139468

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dissertation

Approaches to extra-functional verification of security and reliability aspects in hardware designs = Riistvaraprojektide turva- ja töökindlusaspektide ekstrafunktsionaalse verifitseerimise lähenemisviisidLai, Xinhui2022 https://doi.org/10.23658/taltech.29/2022 https://digikogu.taltech.ee/et/Item/cff1aeb9-b0b2-49ce-b81a-bfb9dc25fd56 https://www.ester.ee/record=b5502807*est

dissertation

Seotud publikatsioonid 5

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APRICOT : a framework for teaching digital systems verificationRaik, Jaan; Jenihhin, Maksim; Tšepurov, Anton; Reinsalu, Uljana; Ubar, Raimund-Johannes19th EAEEIE Annual Conference : June 29-July 2, 2008, Tallinn, Estonia : formal proceedings2008 / p. 172-177 : ill http://dx.doi.org/10.1109/EAEEIE.2008.4610181

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Assertion checking with PSL and high-level decision diagramsJenihhin, Maksim; Raik, Jaan; Tšepurov, Anton; Ubar, Raimund-JohannesDigest of papers IEEE 8th Workshop on RTL and High Level Testing : WRTLT'07 : October 12-13, 2007, Beijing, China2007 / p. 105-110 : ill https://pld.ttu.ee/~maksim/phd_papers/%5B12%5D%20wrtlt%2707.pdf

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Assessment of diagnostic test for automated bug localizationTihhomirov, Valentin; Tšepurov, Anton; Jenihhin, Maksim; Raik, Jaan; Ubar, Raimund-JohannesLATW2013 : 14th IEEE Latin-American Test Workshop, Cordoba, Argentina, April 3-5, 2013 : [proceedings]2013 / [6] p. : ill

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journal article

Automated design error debug using high-level decision diagrams and mutation operatorsRaik, Jaan; Repinski, Urmas; Tšepurov, Anton; Hantson, Hanno; Ubar, Raimund-Johannes; Jenihhin, MaksimMicroprocessors and microsystems2013 / p. 505-513 : ill

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Automated design error localization in RTL designsJenihhin, Maksim; Tšepurov, Anton; Tihhomirov, Valentin; Raik, Jaan; Hantson, Hanno; Ubar, Raimund-Johannes; Bartsch, Günter; Meza Escobar, Jorge Hernan; Wuttke, Heinz-DietrichIEEE design & test of computers2014 / p. 83-92 : ill http://dx.doi.org/10.1109/MDAT.2013.2271420

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Automated identification of application-dependent safe faults in automotive systems-on-a-chipsBagbaba, Ahmet Cagri; Augusto da Silva, Felipe; Sonza Reorda, Matteo; Hamdioui, Said; Jenihhin, Maksim; Sauer, ChristianElectronics2022 / art. 319 https://doi.org/10.3390/electronics11030319 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

Seotud publikatsioonid 1

Methods to optimize functional safety assessment for automotive integrated circuits = Meetodid autotööstuse kiipide funktsionaalse ohutuse hindamise optimeerimiseks

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journal article EST / journal article ENG

An automated method for mining high-quality assertion setsHeidari Iman, Mohammad Reza; Raik, Jaan; Jenihhin, Maksim; Jervan, Gert; Ghasempouri, TaraMicroprocessors and microsystems2023 / art. 104773 https://doi.org/10.1016/j.micpro.2023.104773 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

Seotud publikatsioonid 1

Enhancing assertion-based verification in hardware designs through data mining algorithms = Andmekaeve algoritmide kasutamine riistvarasüsteemide väidete-põhise verifitseerimise parendamiseks

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Automated test bench generation for high-level synthesis flow ABELITEViilukas, Taavi; Jenihhin, Maksim; Raik, Jaan; Ubar, Raimund-Johannes; Baranov, SamaryProceedings of IEEE East-West Design & Test Symposium (EWDTS'2011) : Sevastopol, Ukraine, September 9-12, 20112011 / p. 13-16 : ill https://ieeexplore.ieee.org/document/6116601

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BASTION : board and SoC test instrumentation for ageing and no failure foundJutman, Artur; Lotz, Christophe; Larsson, Erik; Sonza Reorda, Matteo; Jenihhin, Maksim; Raik, JaanProceedings of the 2017 Design, Automation & Test in Europe (DATE) : 27-31 March 2017, Swisstech, Lausanne, Switzerland2017 / p. 115-120 : ill https://doi.org/10.23919/DATE.2017.7926968

book article

Jenihhin, Maksim (author)

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CV 9

name of the person 7