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Modeling for multi-view interference analysis of design aspects in MPSoC designsVain, Jüri; Apneet Kaur; Tsiopoulos, Leonidas; Raik, Jaan; Jenihhin, MaksimRESCUE 2017 : Workshop on Reliability, Security and Quality : ETS17 Fringe Workshop, May 25-26, 2017, Limassol, Cyprus2017 / p. 1-6 http://www.ets17.org.cy/workshop/rescue-workshop.html

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127

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Modeling gate-level abstraction hierarchy using graph convolutional neural networks to predict functional de-rating factorsBalakrishnan, Aneesh; Lange, Thomas; Glorieux, Maximilien; Alexandrescu, Dan; Jenihhin, Maksim2019 NASA/ESA conference on adaptive hardware and systems AHS 2019 : proceedings2019 / p. 72-78 : ill https://doi.org/10.1109/AHS.2019.00007

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Related publications 1

A synthetic, hierarchical approach for modelling and managing complex systems' quality and reliability = Sünteetiline, hierarhiline lähenemine keerukate süsteemide kvaliteedi ja töökindluse modelleerimiseks ja haldamiseks

128

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Modeling microprocessor faults on high-level decision diagrams [Electronic resource]Ubar, Raimund-Johannes; Raik, Jaan; Jutman, Artur; Jenihhin, Maksim; Istenberg, Martin; Wuttke, Heinz-DietrichDSN 2008 : supplemental : 2008 IEEE International Conference on Dependable Systems & Networks With FTCS & DCC (DSN) : June 24-27, 2008, Anchorage, Alaska2008 / p. C17-C22 : ill. [CD-ROM] https://webhost.laas.fr/TSF/WDSN08/2ndWDSN08(LAAS)_files/Slides/WDSN08S-04-Ubar.pdf

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129

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Modeling soft-error reliability under variabilityBalakrishnan, Aneesh; Cardoso Medeiros, Guilherme; Gürsoy, Cemil Cem; Hamdioui, Said; Jenihhin, Maksim; Alexandrescu, Dan2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) : 6-8 Oct. 20212021 / p. 1-6 https://doi.org/10.1109/DFT52944.2021.9568295

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Related publications 1

A synthetic, hierarchical approach for modelling and managing complex systems' quality and reliability = Sünteetiline, hierarhiline lähenemine keerukate süsteemide kvaliteedi ja töökindluse modelleerimiseks ja haldamiseks

130

book article EST / book article ENG

Multi-fragment Markov model guided online test generation for MPSoCVain, Jüri; Tsiopoulos, Leonidas; Kharchenko, Vyacheslav; Apneet Kaur; Jenihhin, Maksim; Raik, JaanICTERI 2017 : ICT in Education, Research and Industrial Applications. Integration, Harmonization and Knowledge Transfer : proceedings of the 13th International Conference on ICT in Education, Research and Industrial Applications. Integration, Harmonization and Knowledge Transfer, Kyiv, Ukraine, May 15-18, 20172017 / p. 594-607 : ill http://www.scopus.com/inward/record.uri?eid=2-s2.0-85020540459&partnerID=40&md5=af226e25c344c52689f23bf5c39cc267 http://ceur-ws.org/Vol-1844/10000594.pdf Conference proceedings at Scopus Article at Scopus

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131

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Multi-view modeling for MPSoC design aspects [Online resource]Vain, Jüri; Apneet Kaur; Tsiopoulos, Leonidas; Raik, Jaan; Jenihhin, MaksimBEC 2018 : 2018 16th Biennial Baltic Electronics Conference (BEC) : proceedings of the 16th Biennial Baltic Electronics Conference, October 8-10, 20182018 / 4 p.: ill https://doi.org/10.1109/BEC.2018.8600986

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132

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Mutation analysis for systemC designs at TLMGuarnieri, Valerio; Bombieri, Nicola; Pravadelli, Graziano; Fummi, Franco; Hantson, Hanno; Raik, Jaan; Jenihhin, Maksim; Ubar, Raimund-Johannes12th IEEE Latin American Test Workshop (LATW) : Porto de Galinhas, Brasil, 27-30 March 20112011 / [6] p https://ieeexplore.ieee.org/document/5985925

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133

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Mutation analysis with high-level decision diagramsHantson, Hanno; Raik, Jaan; Jenihhin, Maksim; Tšepurov, Anton; Ubar, Raimund-Johannes; Guglielmo, Giuseppe di; Fummi, FrancoLATW2010 : 11th Latin-American TestWorkshop, March 28-31, 2010, Punta del Este, Uruguay2010 / [6] p. [CD-ROM] https://ieeexplore.ieee.org/document/5550336

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134

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Nanoelectronics aging mitigation using SSBDD based techniques and dedicated sensorsUbar, Raimund-Johannes; Vargas, Fabian; Jenihhin, Maksim; Raik, JaanMEDIAN Workshop on Circuit Reliability : Modeling and Monitoring, Rome, Italy, February 25, 20132013 / [1] p

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135

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New categories of Safe Faults in a processor-based Embedded SystemGürsoy, Cemil Cem; Jenihhin, Maksim; Oyeniran, Adeboye Stephen; Piumatti, Davide; Raik, Jaan; Sonza Reorda, Matteo; Ubar, Raimund-Johannes2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), Cluj-Napoca, Romania : proceedings2019 / 4 p. : ill https://doi.org/10.1109/DDECS.2019.8724642

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136

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A novel fault-tolerant logic style with self-checking capabilityTaheri, Mahdi; Sheikhpour, Saeideh; Mahani, Ali; Jenihhin, MaksimProceedings - 2022 IEEE 28th International Symposium on On-Line Testing and Robust System Design, IOLTS 20222022 / art. 183305 : ill https://doi.org/10.1109/IOLTS56730.2022.9897818

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137

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On antagonism between side-channel security and soft-error reliability in BNN inference enginesLai, Xinhui; Lange, Thomas; Balakrishnan, Aneesh; Alexandrescu, Dan; Jenihhin, MaksimIFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC)2021 / p. 1-6 https://doi.org/10.1109/VLSI-SoC53125.2021.9606981

book article

Related publications 1

Approaches to extra-functional verification of security and reliability aspects in hardware designs = Riistvaraprojektide turva- ja töökindlusaspektide ekstrafunktsionaalse verifitseerimise lähenemisviisid

138

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On BTI aging rejuvenation in memory address decodersGürsoy, Cemil Cem; Kraak, Daniel; Ahmed, Foisal; Taouil, Mottaqiallah; Jenihhin, Maksim; Hamdioui, Said2022 IEEE 23rd Latin American Test Symposium, LATS 20222022 / Code 184360 https://doi.org/10.1109/LATS57337.2022.9936940

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139

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On NBTI-induced aging analysis in IEEE 1687 reconfigurable scan networksDamljanovic, Aleksa; Squillero, Giovanni; Gürsoy, Cemil Cem; Jenihhin, MaksimVLSI-SoC 2019 : 27th IFIP/IEEE International Conference on Very Large Scale Integration : [proceedings]2019 / p. 335-340 : ill https://doi.org/10.1109/VLSI-SoC.2019.8920313

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140

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On reusability of verification assertions for testingJenihhin, Maksim; Raik, Jaan; Ubar, Raimund-Johannes; Tšepurov, AntonBEC 2008 : 2008 International Biennial Baltic Electronics Conference : proceedings of the 11th Biennial Baltic Electronics Conference : Tallinn University of Technology : October 6-8, 2008, Tallinn, Estonia2008 / p. 151-154 : ill

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141

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On reusability of verification assertions for testingJenihhin, Maksim; Raik, JaanInfo- ja kommunikatsioonitehnoloogia doktorikooli IKTDK kolmanda aastakonverentsi artiklite kogumik : 25.-26. aprill 2008, Voore külalistemaja2008 / p. 43-46 : ill

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142

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On test generation for microprocessors for extended class of functional faultsOyeniran, Adeboye Stephen; Ubar, Raimund-Johannes; Jenihhin, Maksim; Raik, JaanVLSI-SoC: New technology enabler : 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019 Cusco, Peru, October 6–9, 2019 : Revised and Extended Selected Papers2020 / p. 21-44 https://doi.org/10.1007/978-3-030-53273-4 Conference proceedings at Scopus Article at Scopus

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143

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On the combined use of HLDDs and EFSMs for functional ATPGDi Guglielmo, Giuseppe; Fummi, Franco; Jenihhin, Maksim; Pravadelli, Graziano; Raik, Jaan; Ubar, Raimund-Johannes5th IEEE East-West Design & Test Symposium EWDTS 2007 : September 7-10, 2007, Yerevan, Armenia2007 / p. 503-508 : ill

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144

journal article

On the reuse of TLM mutation analysis at RTLGuarnieri, Valerio; Hantson, Hanno; Raik, Jaan; Jenihhin, Maksim; Ubar, Raimund-JohannesJournal of electronic testing : theory and applications2012 / p. 435-448 : ill https://link.springer.com/article/10.1007/s10836-012-5303-6

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145

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On-chip sensors data collection and analysis for SoC health managementShibin, Konstantin; Jenihhin, Maksim; Jutman, Artur; Devadze, Sergei; Tsertov, Anton2023 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)2023 / 6 p https://doi.org/10.1109/DFT59622.2023.10313562

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146

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Open-source framework and practical considerations for translating RTL VHDL to SystemCSaif Abrar, Syed; Jenihhin, Maksim; Raik, JaanIP-SoC 2012 : IP Embedded System Conference & Exhibition : Grenoble, France, Dec. 4-5, 20122012 https://www.design-reuse.com/articles/32685/translating-rtl-vhdl-to-systemc.html

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147

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Optimization methodologies for Cycle-Accurate SystemC models converted from RTL VHDLSaif Abrar, Syed; Jenihhin, Maksim; Raik, JaanIP-SoC 2013 : IP embbeded system conference and exhibition : Grenoble, France, November 6-7, 20132013

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148

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An optimized design of delay-and energy-efficient Booth multiplierRafiq, Ahsan; Jenihhin, Maksime-Prime - Advances in Electrical Engineering, Electronics and Energy2024 / art. 100698 https://doi.org/10.1016/j.prime.2024.100698 Journal metrics at Scopus Article at Scopus

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149

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PASCAL : timing SCA resistant design and verification flowLai, Xinhui; Jenihhin, Maksim; Raik, Jaan; Paul, Kolin2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS 2019) : 1-3 July 2019, Greece2019 / p. 239-242 : ill https://doi.org/10.1109/IOLTS.2019.8854458

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Related publications 1

Approaches to extra-functional verification of security and reliability aspects in hardware designs = Riistvaraprojektide turva- ja töökindlusaspektide ekstrafunktsionaalse verifitseerimise lähenemisviisid

150

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Performance analysis of cosimulating processor core in VHDL and SystemCSaif Abrar, Syed; Shyam Kiran A.; Jenihhin, Maksim; Raik, Jaan; Babu, C.Proceedings of the 2013 International Conference on Advances in Computing, Communications and Informatics (ICACCI) : 22–25 August 2013, Mysore, India2013 / p. 563-568 : ill

book article

Jenihhin, Maksim (author)

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name of the person 9

CV 9