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book article

Fast and efficient static compaction of test sequences using bipartite graph representationsMarkus, Antti; Raik, Jaan; Ubar, Raimund-JohannesECS'99 : proceedings of the 2nd Electronic Circuits and Systems Conference : September 6-8, 1999, Bratislava, Slovakia1999 / p. 17-20

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252

book article

Fast extended test access via JTAG and FPGAsDevadze, Sergei; Jutman, Artur; Aleksejev, Igor; Ubar, Raimund-JohannesInternational Test Conference 2009 : November 1 - November 6, 2009, Austin Convention Center, Austin, Texas USA : proceedings2009 / p. 1-7 : ill http://dx.doi.org/10.1109/TEST.2009.5355668

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253

book article

Fast fault emulation for synchronous sequential circuitsRaik, Jaan; Ellervee, Peeter; Tihhomirov, Valentin; Ubar, Raimund-JohannesProceedings of East–West Design & Test Workshop (EWDTW’04) : Yalta, Alushta, Crimea, Ukraine, September 23-26, 20042004 / p. 35-40 https://citeseerx.ist.psu.edu/document?repid=rep1&type=pdf&doi=a6eb712498a5f23db3f95ad66bada257c21e96f0

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254

book article

Fast fault simulation for extended class of faults in scan-path circuitsUbar, Raimund-Johannes; Devadze, Sergei; Raik, Jaan; Jutman, ArturProceedings : Fifth IEEE International Symposium on Electronic Design, Test and Applications : DELTA 2010 : 13-15 January 2010, Ho Chi Minh City, Vietnam2010 / p. 14-19 https://ieeexplore.ieee.org/document/5438717

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255

journal article EST / journal article ENG

Fast identification of true critical paths in sequential circuitsUbar, Raimund-Johannes; Kostin, Sergei; Jenihhin, Maksim; Raik, Jaan; Jürimägi, LembitMicroelectronics reliability2018 / p. 252-261 : ill https://doi.org/10.1016/j.microrel.2017.11.027 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

journal article EST / journal article ENG

256

book article

Fast RTL fault simulation using decision diagrams and bitwise set operationsReinsalu, Uljana; Raik, Jaan; Ubar, Raimund-Johannes; Ellervee, Peeter2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) : 3-5 October 2011, Vancouver, Canada2011 / p. 164-170 https://ieeexplore.ieee.org/document/6104440

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257

book article

Fast static compaction of test sequences using implications and greedy searchRaik, Jaan; Jutman, Artur; Ubar, Raimund-JohannesETW 2001 : IEEE European Test Workshop : Stockholm, May 29 June 1, 2001 : informal digest2001 / p. 207-209 : ill

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258

book article

Fast static compaction of tests composed of independent sequences : basic properties and comparison of methodsRaik, Jaan; Jutman, Artur; Ubar, Raimund-JohannesThe 9th IEEE International Conference on Electronics, Circuits and Systems : ICECS 2002 : September 15-18, 2002, Dubrovnik, Croatia. Volume II2002 / p. 445-448 : ill http://dx.doi.org/10.1109/ICECS.2002.1046190 https://ieeexplore.ieee.org/document/1046190

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259

book article

Fast test cost calculation for hybrid BIST in digital systemsOrasson, Elmet; Raidma, Rein; Ubar, Raimund-Johannes; Jervan, Gert; Peng, ZeboEuromicro Symposium on Digital Systems Design : [Architectures, Methods and Tools : DSD 2001] : September 4-6, 2001, Warsaw, Poland : proceedings2001 / p. 318-325 : ill https://www.semanticscholar.org/paper/Fast-test-cost-calculation-for-hybrid-BIST-in-Orasson-Raidma/5aafcda5a18c2aabf0ad20cac10af10727f3c58f

book article

260

journal article

Fast test pattern generation for sequential circuits using decision diagram representationsRaik, Jaan; Ubar, Raimund-JohannesJournal of electronic testing : theory and applications (JETTA)2000 / 3, p. 213-226 : ill https://link.springer.com/article/10.1023/A:1008335130158

journal article

261

book article EST / book article ENG

Fault collapsing in digital circuits using fast fault dominance and equivalence analysis with SSBDDsUbar, Raimund-Johannes; Jürimägi, Lembit; Orasson, Elmet; Raik, JaanVLSI-SoC : Design for Reliability, Security, and Low Power : 23rd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015 Daejeon, Korea, October 5-7, 2015 : revised selected papers2016 / p. 23-45 : ill https://doi.org/10.1007/978-3-319-46097-0_2 Conference Proceedings at Scopus Article at Scopus Article at WOS

book article EST / book article ENG

262

book article

Fault collapsing with linear complexity in digital circuitsUbar, Raimund-Johannes; Mironov, Dmitri; Raik, Jaan; Jutman, ArturProceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS 2010) : 30 May - 2 June 2010, Paris, France2010 / p. 653-656 : ill https://ieeexplore.ieee.org/document/5537504

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263

book article

Fault diagnosis in integrated circuits with BISTUbar, Raimund-Johannes; Kostin, Sergei; Raik, Jaan; Evartson, Teet; Lensen, Harri10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007 : 29-31 August 2007, Lübeck, Germany : proceedings2007 / p. 604-610 : ill http://dx.doi.org/10.1109/DSD.2007.4341530

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264

book article

Fault diagnosis in the BIST environment based on bisection of detected faultsUbar, Raimund-Johannes; Kostin, Sergei; Raik, JaanLATW2007 : 8th IEEE Latin-American Test Workshop : March 11-14, 2007, Cuzco, Peru2007 / [6] p. : ill

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265

journal article

Fault diagnosis in VLSI devicesUbar, Raimund-JohannesProceedings of the Estonian Academy of Sciences. Engineering1995 / 1, p. 51-67

journal article

266

book article

Fault diagnosis of VLSI devices using alternative graph representationUbar, Raimund-JohannesProceedings of the 8th Symposium on Microcomputer and Microprocessor Applications, Budapest, October 12-14, 1994. Vol. 11994 / p. 34-44

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267

journal article

Fault effect reasoning in digital systems by topological view on low- and high-level decision diagramsUbar, Raimund-JohannesВестник Томского государственного университета. Управление, вычислительная техника и информатика2014 / p. 99-113 : ill http://journals.tsu.ru/informatics/&journal_page=archive&id=923&article_id=12107

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268

book article

Fault model and test synthesis for RISC-processorsUbar, Raimund-Johannes; Markus, Antti; Jervan, Gert; Raik, JaanBEC'96 : the 5th Biennial Baltic Electronics Conference, October 7-11, 1996, Tallinn, Estonia : proceedings1996 / p. 229-232: ill

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269

book article

Fault modeling and diagnosis in digital systemsUbar, Raimund-JohannesCREDES Summer School : Dependable Systems Design : handouts2011 / p. 91-106 : ill

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270

book article

Fault modeling and test generation with low- and high-level decision diagramsUbar, Raimund-Johannes24. GI/GMM/ITG-Workshop : Testmethoden und Zuverlässigkeit von Schaltungen und Systemen2012 / p. 1-12

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271

book article

Fault oriented test pattern generation for sequential circuits using Genetic AlgorithmsIvask, Eero; Raik, Jaan; Ubar, Raimund-JohannesThe 7th Biennial Conference on Electronics and Microsystem Technology "Baltic Electronics Conference" : BEC 2000 : October 8 - 11, 2000, Tallinn, Estonia : conference proceedings2000 / p. 129-132 : ill

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272

book article

Fault oriented test pattern generation for sequential circuits using genetic algorithmsIvask, Eero; Raik, Jaan; Ubar, Raimund-JohannesIEEE European Test Workshop2000 / p. 319-320

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273

dissertation

Fault simulation of digital systems = Digitaalsüsteemide rikete simuleerimineDevadze, Sergei2009 https://digi.lib.ttu.ee/i/?445 https://www.ester.ee/record=b2508727*est

dissertation

274

book article

Fault simulation with parallel critical path tracing for combinational circuits using structurally synthesized BDDsDevadze, Sergei; Raik, Jaan; Jutman, Artur; Ubar, Raimund-Johannes7th IEEE Latin American Test Workshop LATW'06 : Buenos Aires, Argentina, March 26th-29th, 2006 : proceedings2006 / p. 97-102 : ill

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275

book article

Fault simulation with parallel exact critical path tracing in multiple core environmentGorev, Maksim; Ubar, Raimund-Johannes; Devadze, SergeiProceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE) : 9-13 March 2015, Grenoble, France2015 / p. 1180-1185 : ill

book article

Ubar, Raimund-Johannes (author)

types of item

CV 61

author 57

name of the person 28

subject term 1