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gate-level analysis (võtmesõna)

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Kirjeid leitud 3
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ekspordi kõik päringu tulemused (3)
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Fast identification of true critical paths in sequential circuitsUbar, Raimund-Johannes; Kostin, Sergei; Jenihhin, Maksim; Raik, Jaan; Jürimägi, LembitMicroelectronics reliability2018 / p. 252-261 : ill https://doi.org/10.1016/j.microrel.2017.11.027 Journal metrics at Scopus Article at Scopus Journal metrics at WOS Article at WOS

artikkel ajakirjas EST / artikkel ajakirjas ENG
2

artikkel kogumikus

Hierarchical timing-critical paths analysis in sequential circuitsJürimägi, Lembit; Ubar, Raimund-Johannes; Jenihhin, Maksim; Raik, Jaan; Devadze, Sergei; Kostin, Sergei2018 IEEE 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2018) : 2 – 4 July 2018, Spain2018 / 6 p. : ill https://doi.org/10.1109/PATMOS.2018.8464176

artikkel kogumikus
3

artikkel kogumikus

A scalable technique to identify true critical paths in sequential circuitsUbar, Raimund-Johannes; Kostin, Sergei; Jenihhin, Maksim; Raik, JaanProceedings 2017 IEEE 20th International Symposium on Design and Diagnotics of Electronic Circuit & Systems(DDECS) : April 19-21, 2017, Dresden, Germany2017 / p. 152-157 : ill https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7934553

artikkel kogumikus

Kirjeid leitud 3, kuvan 1 - 3

1. gate-level analysis
2. gate-level circuit abstraction
3. gate-level netlist
4. register transfer and gate level simulation
5. hierarchical two-level analysis
6. system-level analysis
7. logic level and high level BDDs
8. Field Programmable Gate Array (FPGA)
9. field programmable gate arrays
10. field-programmable gate array
11. Field-Programmable Gate Array (FPGA)
12. field-programmable gate arrays
13. FPGA (field-programmable gate array)
14. GaTe
15. gate and register transfer levels
16. gate delay
17. gate driver
18. Gate Injection Transistor (GIT)
19. Golden gate assembly
20. insulated gate bipolar transistors
21. insulated gate-commutated thyristors
22. NBTI-critical gate
23. Opal Kelly ﬁeld programmable gate array (FPGA)
24. absolute sea level
25. airport level of service
26. arousal level
27. assurance level
28. behaviour level test generation
29. bi-level optimization
30. CO2 level in classrooms
31. CO2 level in classrooms and kindergartens
32. confidence level
33. country-level logistics
34. customer compatibility level
35. deep level
36. deep level traps
37. determination of the CO2 level
38. determining the level of creatine
39. digitalisation level
40. distribution-level phasor measurement units (D-PMUs)
41. exposure level
42. extreme penetration level of non synchronous generation
43. extreme water level
44. graduate level
45. high level DD (HLDD)
46. high level synthesis
47. high-level control fault model
48. high-level control faults
49. high-level decision diagram
50. high-level decision diagrams
51. high-level decision diagrams (HLDD) synthesis
52. high-level expert group on AI
53. high-level fault coverage
54. high-level fault model
55. high-level fault simulation
56. high-level functional fault model
57. high-level synthesis
58. High-Level Synthesis (HLS)
59. high-level synthesis for test
60. high-level test data generation
61. improvement of safety level at enterprises
62. improvement of safety level at SMEs
63. level control
64. level set
65. level(s) methodology
66. level-crossing ADC
67. level-crossing analog-to-digital converters
68. level-crossing analogue-to-digital converters (ADC)
69. logic level
70. lower trophic level models
71. low-level control system transportation
72. low-level fault redundancy
73. low-level radiation
74. Low-level RF EMF
75. macro-level industry influences
76. mean sea level
77. module level power electronics (MLPE)
78. module-level power electronics (MLPE)
79. multi-level governance
80. multi-level inverter
81. multi-level modeling
82. multi-level perspective
83. multi-level perspective of sustainability transitions
84. multi-level selection and processing environment
85. operational level (OL)
86. Price level
87. Process/Product Sigma Performance Level (PSPL)
88. PV module level power electronics
89. Register Transfer Level - RTL
90. register transfer level modeling decision diagams
91. register-transfer level
92. relative sea level
93. relative sea-level change
94. RH level
95. school-level policies
96. sea level
97. sea level rise
98. sea level series
99. sea level trend
100. sea level: variations and mean
101. sea-level
102. sea-level changes
103. sea-level equation
104. Sea-level indicator
105. sea-level prediction
106. sea-level rise
107. sea-level trend
108. service-level agreements
109. seven-level multilevel
110. skin conductance level
111. software level TMR
112. steel-level bureaucracy
113. strategic level decision makers
114. system level hazards
115. system level test
116. system planning level
117. system-level evaluation
118. task-level uninterrupted presence
119. three-level
120. three-level inverter
121. three-level neutral-point-clamped inverter
122. three-level NPC inverter
123. three-level T-type
124. three-level T-type inverter
125. three-level T-type quasi-impedance-source inverter (3L-T-type qZSI)
126. three-level voltage inverter
127. Tool Confidence Level
128. top-level domain
129. transaction-level modeling
130. treatment level
131. two-level inverter
132. undergraduate level
133. water level
134. water level fluctuation
135. water level measurements
136. water level reconstruction
137. water-level changes
138. voltage level
139. voltage level optimisation
140. 3-level T-type inverter

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